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TMS570 - EMIF and SRAM - address pins

Jiri Janacek
Genius 3315 points

Dear support,

I have observed strange behaviour regarding external memory interface (intended to be connected with SRAM). I did some dirty experimets with that (EMIF + SRAM) so anything could happen within the controller...

My setting:

- pinmux activated for EMIF asynch interface

- nCS2 is used --> only one register has been set (now it does not depend on operational freq) to enable 16bit mode:

   emifREG->CE2CFG = emifREG->CE2CFG | 1U;

I have electrically disconnected SRAM to perform a measuring of actual state of each address pin.

Prior to any write / read operation 0 Volts {as expected} are measured on all address pins except following ones:

- A2, A6, A7, A8 - on these pins there is 3.3V.

If chip balls of those address pins are switched to other function (RTP_DATA and ETM_DATA), then 0 Volts are measured on these pins.

So it seems that GIO port has not been damaged on these pins - but they are unavailable in EMIF mode...

Do you have any idea? Could just a part of EMIF module be somehow damaged - that sounds weird...?

Many thanks in advance,

Best regards, Jiri

  • 0
    TI__Mastermind 49120 points

    Jiri,

    The EMIF signals multiplexed with other general-purpose I/O signals have an additional control to enable EMIF outputs. These EMIF outputs are enabled by setting the bit 31 of GPREG1 register (address 0xFFFFFFA0) in the "system" module.

    Please set this bit and the EMIF outputs should appear on the terminals.

    Regards, Sunil

  • 0 in reply to Sunil Oak
    Genius 3315 points

    Hello Sunil,

    thanks a lot for your hint! It works ;-)

    Small remark - in the TRM spnu499a on the page 378 there is missing description regarding the 31-th bit of GPREG1.

    Cheers, Jiri