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TMS570x EEPROM/Bank7 erase time

Mathias Reinhard
Prodigy 80 points

My Datasheet lists EEPROM Programming Time (Wide Word) at 40 - 300 µs and Sector/Bank erase at 80ms - 8s.

In understand the maximum values are worst case, considering up to 100,000 write cycles and extreme temperature conditions.

How would these values change if we consider only up to 10,000 or 20,000 write cycles? Is it maybe possible for you to provide a graph how these values change in regard to temperature and write cycles?

  • 0
    TI__Mastermind 22375 points

    Mathias,

    I've forwarded your question to our flash experts. They will be back to you shortly.

  • 0 in reply to Mathias Reinhard
    TI__Guru 72500 points

    I cannot guarantee any values other than the values provided in the device datasheets, but I can give you some more information which will help you understand how erase time increases with the number of times the flash is erased.

    Texas Instruments is very conservative when we specify the maximum erase time for a bank or sector. Also, the erase time increases non-linearly (increasingly positive slope) with increased cycling such that using a linear approximation for interpolating the erase time will be conservative. In short, if you use the maximum 200mS nominal erase time for the first cycle and 8 second maximum erase time at 100,000 cycles and interpolate between them, you will have a consevative estimation of a good erase time limit. This gives a rough limit of 1 second at 10,000 cycles and 1.75 seconds at 20,000 cycles.

  • 0 in reply to Bob Crosby
    Prodigy 80 points

    Ok, this is actually something we can work with. Thanks!