TMS570LS1227: interrupts during writing of EEPROM (BANK7).

Luis Lanca

Part Number: TMS570LS1227

Dear all,

During EEPROM BANK7 writing via F021 FLASH API (SPNU501H) Fapi_issueProgrammingCommand(), do interrupts still occur (trigger)? In other words, during the writing, is it possible to service interrupts from peripherals?

The same question to erasure operation of EEPROM BANK7 via Fapi_issueAsyncCommandWithAddress().

Thanks for your time and support.

With my best regards,

Luis

over 1 year ago

0 jagadish gundavarapu over 1 year ago

TI__Guru 63105 points

Hi Luis,

Luis Lanca said:
During EEPROM BANK7 writing via F021 FLASH API (SPNU501H) Fapi_issueProgrammingCommand(), do interrupts still occur (trigger)? In other words, during the writing, is it possible to service interrupts from peripherals?

The same question to erasure operation of EEPROM BANK7 via Fapi_issueAsyncCommandWithAddress().

Yes, the interrupts will work. Because no F021 API will not disable Interrupts.

The only thing is, if your interrupt vectors or the code that the vectors jump to reside in the same bank as the Flash operation is occurring, the CPU will stall until the Flash operation is complete. But in this case, it is EEPROM Bank 7 right so no issues the interrupts will work.

Please refer below threads for more details:

(+) TMS570LS3137: Regarding interrupt freeze during active flash operation - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

(+) TMS570LS3137: About F021's Fapi_checkFsmForReady() - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

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Thanks & Regards,
Jagadish.