Power Failure Recovery Basics for Internal EEPROM of Tiva TM4C1231H6PM

We are planning to use Tiva TM4C1231H6PM in our design.

We are referring Tiva TM4C1231H6PMIR (Revision 15033.2672, July 16 2013)

 We came across following explanation for power failure recovery mechanism for Internal EEPROM of TM4C1231H6PM in Datasheet 

• Each block contains locations for the active copy plus six redundant copies. When a page runs out of room to store the latest version of a word, a copy buffer is used. The copy buffer copies the latest words of each block. The original page is then erased. Finally, the copy buffer contents are copied back to the page.

• Manual Copy Buffer Erase

If the copy buffer itself is full, then it must first be erased, which adds extra time. The EREQ bit in the EESUPP register is set if the copy buffer must be erased. If so, the START bit can be written by the application to force the erase at a more convenient time. The EEDONE and EEINT registers can be used to detect completion.

• Error During Programming

A normal write performs two underlying writes: the control word write and the data write. If the control word writes but the data fails (for example, due to a voltage drop), the overall write fails with indication provided in the EEDONE register. Failure and the corrective action are broken down by the type of operation:

• If a normal write fails such that the control word is written but the data fails to write, the safe course of action is to retry the operation once the system is otherwise stable. For example, when the voltage is stabilized. After the retry, the control word and write data are advanced to the next location.

•  If the word write requires the block to be written to the copy buffer, then it is possible to fail or lose power during the subsequent operations. A control word mechanism is used to track what step the EEPROM was in if a failure occurs. If not completed, the EESUPP register indicates the partial completion, and the EESUPP START bit can be written to allow it to continue to completion.

• If a copy buffer erase fails or power is lost while erasing, the EESUPP register indicates it is not complete and allows it to be restarted

• EEPROM Support Control and Status (EESUPP), offset 0x01C
  • The EREQ bit is set if the internal copy buffer must be erased as it is full.It can be erased manually using this register by setting the START bit.
  • If either PRETRY or ERETRY is set indicating that an operation must be completed, setting the START bit causes the operation to be performed again.

We came across following function from library, which handles the power failure recovery for Internal EEPROM of TM4C1231H6PM

 EEPROMInit(void)

{

    uint32_t ui32Status;

     // Insert a small delay (6 cycles + call overhead) to guard against the  possibility that this function is called immediately after the EEPROM peripheral is enabled.  Without this delay, there is a slight chance that the first EEPROM register read will fault if you are using a compiler with a ridiculously good optimizer!

     SysCtlDelay(2);

     // Make sure the EEPROM has finished its reset processing.

     _EEPROMWaitForDone();

    // Read the EESUPP register to see if any errors have been reported.

    ui32Status = HWREG(EEPROM_EESUPP);

    // Did an error of some sort occur during a previous attempt to write to the EEPROM?

    if(ui32Status & (EEPROM_EESUPP_PRETRY | EEPROM_EESUPP_ERETRY))

    {

         // Perform a second reset to allow the EEPROM a chance to correct the errors.

        SysCtlPeripheralReset(SYSCTL_PERIPH_EEPROM0);

        // Wait for the EEPROM to complete it's reset processing once again.

        SysCtlDelay(2);

        _EEPROMWaitForDone();

        // Read EESUPP once again to determine if the error conditions are cleared.

        ui32Status = HWREG(EEPROM_EESUPP);

        if(ui32Status & (EEPROM_EESUPP_PRETRY | EEPROM_EESUPP_ERETRY))

        {

            return(EEPROM_INIT_ERROR);

        }

        else

        {

            return(EEPROM_INIT_RETRY);

        }

    }

    // The EEPROM does not indicate that any error occurred.

     return(EEPROM_INIT_OK);

}

Our queries

1. We found above function check only EEPROM_EESUPP_PRETR and EEPROM_EESUPP_ERETRY flag. It is not checking EEPROM_EESUPP_EREQ flag. Why function is not checking EEPROM_EESUPP_EREQ flag (The one used to indicate the copy buffer itself is full)?
2. After checking  EEPROM_EESUPP_PRETR,EEPROM_EESUPP_ERETRY and EEPROM_EESUPP_EREQ flag, it is expected for software to restart the operation by setting the START flag of EESUPP register. We are not able to locate same in above function and the internally called function SysCtlPeripheralReset(SYSCTL_PERIPH_EEPROM0). Please help us to locate same.
3. For error during programming, it is explained as, if a normal write fails such that the control word is written but the data fails to write, the safe course of action is to retry the operation once the system is otherwise stable, for example, when the voltage is stabilized. After the retry, the control word and write data are advanced to the next location. 
   1. In safe course of action of retry, what is the role of the software?
   2. Safe course of action of retry is the internal functionality of the microcontroller?
   3. Suppose 0x11223344 is the original data of a specific word of the eeprom. User intended to replace with new value as 0xAABBCCDD.While writing new word (after first byte write from word), if power goes off and comes back, then what will be the value of that specific word of the eeprom (Old value, New value, Corrupt value)?
   4. Under which situation the eeprom location will have the corrupted value?

Thanks in advance.....