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Hello
I'm making a CANopen master and I'm concerned that using the RM48's mailboxes won't allow me to hear all of the messages that I need to. I'm looking at the use of ID and the bit mask to use on the IDs - is it possible to use the bit mask to filter certain messages and have multiple IDs going into the same mailbox?
Thank you
Chris
Chris,
Yes our can module allows to use mask to receive multiple IDs in the same mailbox.
Have you look to the CAN Chapter in the Technical Reference Manual for RM48?
Here is the TRM: http://www.ti.com/lit/ug/spnu503b/spnu503b.pdf
Hi Jean-Marc
I think I'm just understanding this incorrectly - is this something that can be done with the HALCoGen configuration (aka do I just leave the ID field blank?) and adjust my message ID bit mask accordingly? I've become pretty familiar with this chapter but I'm still not sure how to do this exactly though to be entirely honest, I haven't changed the bitmask on the ID.
What I'm trying to do is leave one mailbox (box 64) open as a wildcard catch all.
Chris
Hi Chris,
In order to use identifier masking, UMask must be set for the according message object.
If identifier masking is disabled (UMask = 0), all identifier bits of a received CAN message must
match the identifier bitfield ID[28:0] for extended identifiers resp. ID[28:18] for standard identifiers.
If identifier masking is enabled (UMask = 1), Msk[28:0] bitfield defines which identifier bits
of a received CAN message must match the according bits of the identifier bitfield ID[28:0]. For
standard identifiers only Msk[28:18] are relevant, bits Msk[17:0] have no functionality.
Examples for extended identifiers:
UMask = 1 and all bits of Msk[28:0] are set to 1: all identifier bits must match identifier bitfield ID[28:0] (same as if UMask = 0).
UMask = 1 and all bits of Msk[28:0] are set to 0: no identifier bit must match identifier bitfield ID[28:0] (all CAN messages will be received).
UMask = 1 and Msk[28:0] is set to 0x7: bits 0, 1 and 2 of the identifier must match identifier bitfield ID[2:0], bits 3 to 28 of the identifier are don't care.
Best Regards,
Peter Steffan
Thank you Peter - it was really confusing in the beginning since our HALCoGen project was set up where it looked like it was the reverse of what you were saying (but since they're ANDed together it's the same effect)
Chris
So now that I'm receiving messages into the correct message boxes, (for this case say (0x780 & 0x080) into bin 62) I receive the messages when I want them but I can't figure out how to get the ID of the actual message on the wire. I tried copying the arbitration register when the data was gathered from the message box but all I got was the ID of my thing that gets ANDed (what's set in HALCoGen)
Hi Peter
After doing what you'd suggested, I can't seem to get the exact ID of the message that came across the wire. It filters into the right bin but whenever I try to get the ID, using the interface registers, I pull up the ID against which I had masked the message box. Am I looking in the wrong place?
Thank you
Chris
Hi Chris,
The arbitration bits should have the ID information of the received message. If some bits of the Mask bitfield are set to “don’t care” (set to '0'), the corresponding bits of the arbitration bits will be overwritten by the bits of the stored data frame.
Pls. make sure in the DCAN IFxCMD register, that the arbitration bits get really transferred from the message RAM to the IF register set before the CPU reads this information.
Best Regards,
Peter
Thank you very much Peter - I didn't realize I had to OR the bit on to grab the arbitration register.