Using ALTCLK alternative clock source for Timer

Hello Bruno

You have run into the GPTM #16 errata. If you still plan to use 32K clock source as counter, then I would suggest using it in the Hibernate Module. There would be restrictions of course, but not something as bad as the device not connecting or hanging.

Regards

Amit

Hello Amit, thanks again!

I checked the GPTM#16 errata, it does not seem to be exactly this issue... Let me try to explaing a bit further:

I was not trying to use the timer on 32-bit mode, but rather on 16-bit. What my application needs is to measure the width of "slow" pulses. So the idea is to use the capture mode, having that particular timer using 32K source.

Here is a short paste of code:

void main(void)
{
    g_ui32SysClock = MAP_SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ | SYSCTL_OSC_MAIN | SYSCTL_USE_PLL |	SYSCTL_CFG_VCO_480), 120000000);

    // Configures register ALTCLKCFG to use RTCOSC as a source (this is used on slow timers to run @32768Hz)
    //HWREG(0x400FE000 + 0x138) = (0x03);

    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOM);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER3);
    GPIOPinConfigure(GPIO_PM2_T3CCP0);
    GPIOPinTypeTimer(GPIO_PORTM_BASE,GPIO_PIN_2);

    TimerConfigure(TIMER3_BASE, TIMER_CFG_SPLIT_PAIR |TIMER_CFG_A_CAP_TIME_UP);
    HWREG(TIMER3_BASE + 0xFC8) = 0x01;  // Configure register GPTMCC of this timer to use the alternate clock ALTCLK
    TimerControlEvent(TIMER3_BASE,TIMER_A,TIMER_EVENT_POS_EDGE);  // Timer count on each positive (raising) edge
    TimerEnable(TIMER3_BASE, TIMER_A);
    
    // Further on: enable timer interrupt and do the rest

    while(1) {}
}

If I uncomment the HWREG line, the uC hangs beyond repair (or rather, requiring LM FLASH...)

Would that be an "add on" to the errata, or am I following a wrong sequence or forgetting something?

Hello Bruno,

Thanks for the code post. the RTC may be selected as the clock source but it needs to be enabled via the hibernate module as the clock originates from there (I do not see Hibernate clocking being enabled in the code)

1. Enable the clock to Hibernate module

2. Enable the CLKEN bit in HIBCTL register and wait for WRC bit in HIBCTL to become 1

3. Set RTCEN or PINWEN in the HIBCTL register and wait for WRC bit in HIBCTL to become 1

4. Set the SYSCLKEN in the HIBCC register.

Regards

Amit

Hello everybody,

I'm currently struggling with the same issue as explained by Bruno. Hardware is the same, software most actual versions (SW-TM4C-2.1.1.71, ccsv6.1), but basically the same.

I need an slow clock for a certain timer. The table 5-4 on page 231 of datasheet of tm4c1294ndpdt shows the state of the clock sources after a POR (Power on Reset), which is following:

Clock Source	Power-On Reset State
PLL	Disabled/Powered Off
MOSC	Disabled/Powered Off
LFIOSC	Enabled
PIOSC	Enabled
HIB RTCOSC	Disabled

On page 959 (GPTM) of same data sheet one can find follwing:

13.3.2 Timer Clock Source
The general purpose timer has the capability of being clocked by either the system clock or an
alternate clock source. By setting the ALTCLK bit in the GPTM Clock Configuration (GPTMCC)
register, offset 0xFC8, software can selects an alternate clock source as programmed in the Alternate
Clock Configuration (ALTCLKCFG) register, offset 0x138 in the System Control Module. The
alternate clock source options available are PIOSC, RTCOSC and LFIOSC. Refer to “System
Control” on page 220 for additional information.

I've tried to configure the LFIOSC as clock alternate clock and to enable alternative clocking on timer, but when debugged the mcu showed a strange behaviour.
Following code was used:

/**
 * Configures the alternate peripheral clock source
 *
 * LFIOSC Low-Frequency Internal Oscillator provides a nominal frequency of
 * 33 kHz
 */
SysCtlAltClkConfig(SYSCTL_ALTCLK_LFIOSC);

/**
 * Enable alternate clock source for the timer module
 */
TimerClockSourceSet(TIMER3_BASE, 	/**<Timer module   */
		    TIMER_CLOCK_PIOSC);	/**<Alternate clock source   */

I've watched the timer 3 module registers. After activating the alternate clock source on timer3, the register entries turn all 0xFF... and the timer and code stopped working, which resulted in an FaultISR().

I've tried afterwards to use the RTCOSC instead, but it resulted in a bad malfunction, as described by Bruno before.

/**
 * Configures the alternate peripheral clock source
 *
 */
SysCtlAltClkConfig(SYSCTL_ALTCLK_RTCOSC);

/**
 * Enable alternate clock source for the timer module
 */
TimerClockSourceSet(TIMER3_BASE, 	/**<Timer module   */
		    TIMER_CLOCK_PIOSC);	/**<Alternate clock source   */

My biggest problem right now is that, unlocking with LM Flash Programmer and with CCS Uniflash (which seems not to work anyway, as can be found in various forums) does not work. I get following ERROR messages:

LM Flash Programmer - **ERROR**: Failed to unlock connected device!

CCS Uniflash - Console

[23:59:30] Begin Unlock operation.
[23:59:30] CORTEX_M4_0: Starting Debug Port Unlock operation...

[23:59:30] ERROR >> CORTEX_M4_0: Error: Failed unlocking device!

[23:59:30] Operation Unlock returned.

Can anybody help somehow? Is there any further way to restore functionality of EK-TM4C1294NCPDT Launchpad?

Furthermore, I wan't to ask if it is possible to use alternate clocks, to be more precise, low frequency clocks as clock source for GPTMs?

It is really strange that the datasheet exlpaines functionality of clock configuration and what is possible that incorrect. From my understanding, it is clearly stated that LFIOSC can be used as alternate clock of timer module.

The TivaWare library however, only provides an define to turn on alternate clocking by PIOSC, at least from what the name says (TIMER_CLOCK_PIOSC). In comparison, page 1027 (Register 28: GPTM Clock Configuration (GPTMCC), offset 0xFC8) in tm4c1294ncpdt datasheet clearly states the function of ALTCLK bit in this register is as follows: - Note: function TimerClockSourceSet used before, writes either 0 or 1 in this bit field (ALTCLK).

0	ALTCLK	RW	0x0	Alternate Clock Source
				Value Description
				0 System clock (based on clock source and divisor factor programmed in RSCLKCFG register in the System Control Module)
				1 Alternate clock source as defined by ALTCLKCFG register in System Control Module.

Note: ALTCLKCFG is configured with function SysCtlAltClkConfig().

I really appreciate your help! Hope somebody has a clue and can tell me how I can "repair/restore" launchpad functionality and configure timer clock as described.

Thanks in advance!

Kind regards
Alija 

Hello Alija,

I have used both LMFlashProgrammer and Uniflash with EK-TM4C1294XL to unlock the device.

Please check the steps that you are using to unlock the device as per the post below

e2e.ti.com/.../374640

While the alternate clock configuration as described in the data sheet is valid, we have found an issue in using clock sources other than System Clock which is going to be added as an errata item. Please note that system clock is the only valid clock source for Timers. If you want to use a slow clock then Hibernate module can be used for time keeping but not with the features that General Purpose Timers allow.

Regards
Amit

Hello Amit,

first let me thank you for the very quick reply.

I've found your post in https://e2e.ti.com/support/microcontrollers/tiva_arm/f/908/t/475655 where you write:

> The specific thing to look for is the TI Emulator Version has to 6.0.83.0 in CCS Installation. If that is there then you can use XDS100V2 or XDS200 to unlock the device.

> First on a command window change the path to "ccsv6/ccs_base/common/uscif" and then run the following

> dbgjtag -f @xds100v2 -Y unlock,mode=tiva

> dbgjtag -f @xds200 -Y unlock,mode=tiva

> Since I had a XDS200 I was able to verify the same. I can check if XDS100V2 works only on Monday.

First question: Where can I verify the TI Emulator Version?

Second: I've executed both command with following results:

dbgjtag -f @xds100v2 -Y unlock,mode=tiva

C:\ti\ccsv6\ccs_base\common\uscif>dbgjtag -f @xds100v2 -Y unlock,mode=tiva

Executing Tiva unlock procedure.

Assert and hold reset while powering up the device.
Press any key to continue.

An error occurred while soft opening the controller.

-----[An error has occurred and this utility has aborted]--------------------

This error is generated by TI's USCIF driver or utilities.

The value is '-600' (0xfffffda8).
The title is 'SC_ERR_LIB_ANY_LOCATE'.

The explanation is:
A required dynamic library could not be located.
The library isn't on the search path.

 

dbgjtag -f @xds200 -Y unlock,mode=tiva

C:\ti\ccsv6\ccs_base\common\uscif>dbgjtag -f @xds200 -Y unlock,mode=tiva

Executing Tiva unlock procedure.

Assert and hold reset while powering up the device.
Press any key to continue.

E_RPCENV_IO_ERROR(-6) No connection: DTC_IO_Open::dtc_io
Failed to open i/o connection (xds2xxu:0)

An error occurred while soft opening the controller.

-----[An error has occurred and this utility has aborted]--------------------

This error is generated by TI's USCIF driver or utilities.

The value is '-250' (0xffffff06).
The title is 'SC_ERR_ECOM_EMUNAME'.

The explanation is:
An attempt to access the debug probe via USCIF ECOM has failed.

Apparently it doesn't work. I'm also not 100% sure how to assert and hold the reset button. I've tried both, pressing, holding reset button, connecting launchpad and still holding when performing unlock, and pressing, holding reset button, connection launchpad, releasing button and performing unlock afterwards.

How is it supposed to be?

Kind regards,
Alija

Hello Alija

On the connected launchpad EK-TM4C1294XL the above method will not work as it uses Stellaris ICDI and not XDS class debugger. You must use LMFlashProgrammer or the Uniflash with Stellaris ICDI set as the debugger

Regards
Amit

Hi Amit,

thank you. I see now that it can't not work with XDS as I am using Stellaris ICDI.

I wrote in the post before, that I've tried it already with Uniflash. There I've used target_config.ccxml I've been also using when developing on the EK-TM4C1294XL launchpad. So it should work. I've checked the configuration as well, it is set to Stellaris ICDI, but as I wrote before, I get following error messages:

CCS Uniflash - Console

[23:59:30] Begin Unlock operation.

[23:59:30] CORTEX_M4_0: Starting Debug Port Unlock operation...

[23:59:30] ERROR >> CORTEX_M4_0: Error: Failed unlocking device!

[23:59:30] Operation Unlock returned.

LM Flash Programmer is configured via Quick Set to TM4C1294XL LaunchPad but results in follwing error message:
Note: Can you tell me the correct parameters for manual configuration (Port, Speed)?

LM Flash Programmer

**ERROR**: Failed to unlock connected device!

None of the suggested solutions does works currently. Maybe I've understood something wrong.

I've forgot to mention one detail before. The launchpad shows this behaviour from the point where I've debugged follwing steps (explained before):

**
 * Configures the alternate peripheral clock source
 *
 */
SysCtlAltClkConfig(SYSCTL_ALTCLK_RTCOSC);

/**
 * Enable alternate clock source for the timer module
 */
TimerClockSourceSet(TIMER3_BASE,    /**<Timer module   */
            TIMER_CLOCK_PIOSC); /**<Alternate clock source   */

But actually, the order was following:

/**
 * Enable alternate clock source for the timer module
 */
TimerClockSourceSet(TIMER3_BASE,    /**<Timer module   */
            TIMER_CLOCK_PIOSC); /**<Alternate clock source   */

**
 * Configures the alternate peripheral clock source
 *
 */
SysCtlAltClkConfig(SYSCTL_ALTCLK_RTCOSC);

I've set the clocking on the timer to alternate (which seems to work, because alternate clocking is initally set to PIOSC) and switch the alternate clock to RTCOSC afterwards. Maybe the order of the steps causes a different failure than the one observed by Bruno, but actually I do not believe it. I just want to mention it to provide all details.

Kind regards,
Alija

Hello Alija

Please note that unlocking requires a specific sequence of operation to be done. The Power Up of the board has to be done with the reset pressed and the reset pressed till the LMFlashProgrammer gives the message to release reset

Regards
Amit