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Problem when calling the MSR (Banked register) instruction

Jerome Beauvais
Expert 1770 points
Other Parts Discussed in Thread: RM48L952

I need to examine by software the stack pointer of the task which is interrupted by fiq interrupt.

I try to transfer the stack pointer of interrupted routine in R10_fiq register.

I used the following instruction:

MSR    r10,r13

But I got the following error:

 [E0004] Illegal operand

What can I do?

Thank for your help

Kind Regards

  • 0
    TI__Guru**** 393215 points

    FIQ is not supported on general-purpose Sitara processors. What processor are you asking about?

  • 0 in reply to Biser Gatchev-XID
    Expert 1770 points

    I work on cortex-R4F, microcontroler RM48L952.

    Thanks for your help.

    Kind Regards

  • 0 in reply to Jerome Beauvais
    TI__Guru**** 393215 points

    You are in the wrong forum then. I will move this thread to the correct forum.

  • 0 in reply to Biser Gatchev-XID
    TI__Guru 68830 points

    Hi Jerome,

    I think this is a duplicate now of http://e2e.ti.com/support/microcontrollers/hercules/f/312/t/364625.aspx

    Sorry we missed the earlier 'move' - once a post has several answers and when it's got a TIer answering a lot of times we don't check well enough.

  • 0 in reply to Anthony F. Seely
    Expert 1770 points

    Hi Anthony,

    No problem, I think the first question was not so clear.

    So the response to both questions is:

    STMFD SP, {R13}^            ;Store R13 User Mode onto FIQ mode Stack

    LDMEA SP,{R8}                ;Load it back into R8 FIQ mode.

    You answered to both questions

    Kind Regards

  • 0 in reply to Jerome Beauvais
    TI__Guru 68830 points

    Hi Jerome,

    Just want to clarify the stack types.   I think I forgot the ! after the SP so it should really be:

    STMFD SP!, {R13}^            ;Store R13 User Mode onto FIQ mode Stack

    LDMFD SP!,{R8}                ;Load it back into R8 FIQ mode.

    Reference is: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0204j/Cacbgchh.html

    I think the reason you had to use "EA" for the load is that I forgot the ! but then the SP wouldn't be updated based on the push so it's not really safe - if an interrupt occurred between the two operations the value could be corrupted.
    Sorry about the mistake.

    Best Regards,

    Anthony

  • 0 in reply to Anthony F. Seely
    Expert 1770 points

    Anthony,
    Don’t be sorry, with this mistake, I learned a lot.
    Of course the best way is the following instructions:
    STMFD SP!, {R13}^            ;Store R13 User Mode onto FIQ mode Stack

    LDMFD SP!,{R8}                ;Load it back into R8 FIQ mode.

    I will use it.
    I suppose a problem could happen with Fiq nested interrupts.
    The other exceptions have their own stack with banked SP.
    Thanks for all again
    Kind Regards

  • 0 in reply to Jerome Beauvais
    Expert 1770 points

    Hello Anthony
    Excuse my insistance but with CCS 5.0 and cortex R4F for the following instruction:
     STMFD SP!, {R13}^

    I got the following error:

    [E0004] Cannot specify both base write-back and S bit for this instruction.

    Maybe you have an explanation for that error?

    I propose the following code to examine the SP_user:

                    ;Here the processor is in fiq mode

                    push      {r0}                        ;Save r0 on fiq Stack

                    cps         #31                        ;Switch to System Mode ( Shares User Mode registers ) (M = 11111)

                    mov       r0,r13                    ;Move user SP to r0

                    cps         #17                        ;Return to FIQ mode (M = 10001)

                    mov       r8,r0                      ;Move r0 to R8 (Or work on r0)

                    ...                                          

                    pop        {r0}                        ;restore r0 from fiq Stack

    It’s working but can you see a safety problem?
    Kind regards