Hercules MIBSPI RM48 HalCoGen Example Does not Work

Hello Tam,

Sorry for the late reply.

1. The result is with the mibiTransfer, only the first 8 words are transmitted from TX_BUFFER to RX_BUFFER, and not the entire contents of the TX_BUFFER (D_SIZE = 127).  Why are only the 1st 8 words transmitted and not the entire TX_BUFFER?

>> Can you upload the zipped CCS project that shows this issue?

2. Do we need to select the PINMUX also for MIPSPI1 for this example? When do we need to enable PINMUX for each driver (i.e., MIBSPI1, I2C, SCI, etc.) and when is it not necessary? What does it mean when we enable the MIBSPI PINMUX, and HalCoGen reports a conflict?

>> The datasheet indicates whether a given terminal is shared between multiple functions. For example, MibSPI1 functions are assigned to the following terminals on the 337BGA package:

In the above table, the function listed first in each row is the default function selected for that terminal. So MibSPI1CLK, nCS[0], nENA, SIMO[0] and SOMI[0] are the default functions. You don't need to configure any I/O multipelxing in order to use these functions on the assigned terminals. You would need to configure an I/O multiplexing control register in order to output N2HET1[23] on the G19 terminal, as an example.

3. When we have this test working, then we can create a test driver for MIBSPI1 with enabling interrupt. But do we need to also need to enable to enable the DMA interrupts? (.e., DMA FTCA, DMA LFSA, DMA HBCA, etc. VIM Channels)?  When do these DMA channels need to be enabled?

>> This is determined by the application's use case. Usually, the application configures the DMA to respond to TX and RX DMA requests from the MibSPI, and then to interrupt the CPU whenever a DMA transfer is completed, or has reached a particular completion status (half block, frame, penultimate frame, etc.)

Regards, Sunil

Hi,

  It is Ok. It actually allowed me to find the problem which was a configuration in HalCogen that was wrong. Now this test passes Ok.

  On the multiplexing. i.e., taking 

MIBSPI3NCS[0]/AD2EVT/GIOB[2]/N2HET2_PIN_nDIS  V10 for example (or any from your table above).

What if we needed to use both GIOB[2] and the MIBSPI3NCS[0], as well as AD2EVT.  The default function is MIBSPI3NCS[0].  So, if we also needed GIOB[2] and AD2EVT, you mean we have to configure an I/O multiplexing control register in order to also output GIOB[2] and AD2EVT on the V10 terminal?  Do have an example of how to set up the control register to support more than one output on a single terminal?  Thank you.

Hi Tammy,

The controls for the I/O multiplexing are specified in the Technical Reference Manual (TRM). SPNU503 is the TRM for the RM48x MCUs.

Section 4.6 shows the functions multiplexed and the required controls. For example, consider the following:

Above image shows the multiplexed functions controlled by the PINMMR0 register. Each byte of this register affects a different terminal. Bits PINMMR0[16 - 23] are used to select between MIBSPI3NCS[3] / I2C_SCL / N2HET1[29].

The default function is MIBSPI3NCS[3]. If you want to output I2C_SCL on the assigned terminal (specified in datasheet as C3), then you need to clear PINMMR0[16] and set PINMMR0[17].

Similarly, if you want to output N2HET1[29], then you need to clear PINMMR0[16, 17] and set PINMMR0[18].

You cannot obviously output all three multiplexed functions on a given terminal at the same time.

Regards, Sunil

Ok. So in the case of output from RM48, so each MIBSPI3NCS[3] / I2C_SCL / N2HET1[29] set/clear the various bits of the PINMMR0 register to output what we need to output. But in terms of what is connected to the one terminal, can >1 hardware component be connected to the terminal so that depending on how we configure PINMMR0 at runtime, the output goes to the right hardware intended for the output and this can be changed on-the-fly depending on the feature and what we want to output? Or is it assumed we set this function 1 time at poweron and there is only the 1 type of hardware connected to the terminal, and that is what this terminal must be always used as? How about a terminal that is programmed with >1 input functions (i.e., GIO, NHET/PWM, etc.)? What we are trying to understand is, when we have i.e., 16 NHET/PWMs available but if they are multiplexed on the same terminal as i.e., MIBSPI or GIO, does that mean we can only pick one function per terminal  to deploy with? Or at runtime, can we configure so that we have access to all the GIO and all the NHET/PWM, MIBSPI... (all these functions) in parallel and we can have >1 type of hardware connected to one terminal so that the processor knows where to send output, or i.e., where input is coming from?  Or do we have to give up some functions when they are sharing a terminal, and we can only pick "one"?  Thank you.

Tammy,

You can change the pinmux settings at runtime.   

But I think what you'll find is that the HalCoGen tool assumes a static setup.   You probably need to write your own code to change the specific pin mux registers that are needed for the pins you want to adjust.

Also when you write to the pinmux registers yourself - don't forget that they are protected.  You need to write some key values to the 'kick' registers in order to open the pinmux up for changes.  It's good then to close the kick registers again after making your changes to put them back in a protected state.