Feedback HALCoGen 04.03.00 (Use of functions ..GetConfigValue)

Hi HALCoGen - Team,

some Feedback about minor things in actual release 04.03.00 for Device TMS570LS0332:

1: In gio.c: function: gioGetConfigValue(...)

original Code:

config_reg->CONFIG_PORTAPSL = gioPORTA->PULDIS;

config_reg->CONFIG_PORTAPULDIS = gioPORTA->PSL;

I think they are interchanged!?

2:in can.h define's

#define CAN1_TIOC_CONFIGVALUE ((uint32)((uint32)1U << 18U ) \

|(uint32)((uint32)0U << 17U ) \

|(uint32)((uint32)1U<< 16U ) \

|(uint32)((uint32)0U << 3U ) \

|(uint32)((uint32)1U << 2U ) \

|(uint32)((uint32)1U << 1U ))

#define CAN1_RIOC_CONFIGVALUE ((uint32)((uint32)1U << 18U ) \

|(uint32)((uint32)0U << 17U ) \

|(uint32)((uint32)1U<< 16U ) \

|(uint32)((uint32)0U << 3U ) \

|(uint32)((uint32)1U << 2U ) \

|(uint32)((uint32)1U << 1U ))

The value for bits 16 and 17 are interchanged. Bit 16 gets 1 when I disable Pull in the GUI. And Bit 17 gets 1 when I enable open drain mode in gui.

It's the same for CAN2

But the Init in .c file is correct.

3: in can.c function can1GetConfigValue and can2GetConfigValue

The result of canREG1->TIOC is not static. It depends on the value of the pin. So it's necessary to mask the Bits 0 and 1 to make it comparable with static value from  CAN1_TIOC_CONFIGVALUE.

The result of canREG1->RIOC is not static. It depends on the value of the pin. So it's necessary to mask the Bits 0 and 1 to make it comparable with static value from  CAN1_RIOC_CONFIGVALUE.

The result of canREG1->TEST is not static. It depends on the value of the pin. So it's necessary to mask the Bit 7 to make it comparable with static value from  CAN1_TEST_CONFIGVALUE.

It's the same for CAN2

4: in pinmux.c function: pinmuxGetConfigValue

Up to now there are no Setup for Initial values:

I propose following code:

if (type == InitialValue)

{/* Do not pass Initial Value as parameter */

config_reg->CONFIG_PINMMR0 = PINMUX_MR0_CONFIGVALUE;

config_reg->CONFIG_PINMMR1 = PINMUX_MR1_CONFIGVALUE;

config_reg->CONFIG_PINMMR2 = PINMUX_MR2_CONFIGVALUE;

config_reg->CONFIG_PINMMR3 = PINMUX_MR3_CONFIGVALUE;

config_reg->CONFIG_PINMMR4 = PINMUX_MR4_CONFIGVALUE;

config_reg->CONFIG_PINMMR5 = PINMUX_MR5_CONFIGVALUE;

config_reg->CONFIG_PINMMR6 = PINMUX_MR6_CONFIGVALUE;

}

else

{

/*SAFETYMCUSW 134 S MR:12.2 <APPROVED> "LDRA Tool issue" */

config_reg->CONFIG_PINMMR0 = pinMuxReg->PINMMR0;

config_reg->CONFIG_PINMMR1 = pinMuxReg->PINMMR1;

config_reg->CONFIG_PINMMR2 = pinMuxReg->PINMMR2;

config_reg->CONFIG_PINMMR3 = pinMuxReg->PINMMR3;

config_reg->CONFIG_PINMMR4 = pinMuxReg->PINMMR4;

config_reg->CONFIG_PINMMR5 = pinMuxReg->PINMMR5;

config_reg->CONFIG_PINMMR6 = pinMuxReg->PINMMR6;

}

And in pinmux.h wie need something like:

#define PINMUX_MR0_CONFIGVALUE PINMUX_PIN_1_GIOA_0

#define PINMUX_MR1_CONFIGVALUE (PINMUX_PIN_2_GIOA_1 | PINMUX_PIN_5_GIOA_2 | PINMUX_PIN_8_GIOA_3 | PINMUX_PIN_9_GIOA_4)

#define PINMUX_MR2_CONFIGVALUE (PINMUX_PIN_10_GIOA_5 | PINMUX_PIN_12_HET_31 | PINMUX_PIN_18_HET_29)

#define PINMUX_MR3_CONFIGVALUE (PINMUX_PIN_27_MIBSPI1nCS_2 | PINMUX_PIN_36_SPI3CLK | PINMUX_PIN_37_SPI3nENA)

#define PINMUX_MR4_CONFIGVALUE (PINMUX_PIN_38_SPI3nCS_0 | PINMUX_PIN_39_HET_26 | PINMUX_PIN_58_HET_28)

#define PINMUX_MR5_CONFIGVALUE PINMUX_PIN_68_HET_30

#define PINMUX_MR6_CONFIGVALUE PINMUX_PIN_93_MIBSPI1nCS_1

The Information of these lines is the same as in pinmux.c in function muxInit( void). So it should be possible to arrange?

5. Up to now it's not possible to enable both edges as Interrupt source for gio input's in the GUI. Only rising or falling but not both. May be it is possible to extend this in a future release of the GUI? The TMS570LS0332  has register GIO Interrupt Detect Register (GIOINTDET) to enable both.

Thanks for your great work and Support.

Regards,

Frank