Hi,
I'm using TMS570LS1227 MCU and Halcogen 4.4.0.
In my project, I use the DCC1 module to verify OSCIN frequency, so I have selected:
- clock source 0: HF_LPO 10 MHz or 9,6 MHz?
- clock source 1: VCLK 20 MHz (the source of VCLK is PLL1)
First problem: the HF_LPO frequency should be 9,6 MHz because I have selected the trim from OTP (as in SPNS192B document).
Second problem: the HF_LPO trimmed frequency can change from 8 MHz to 11 MHz, with an error of 15% about. So in DCC1 module, Should I set the clock drift to 15%? If so, the HF_LPO frequency cannot bet used to compare it to another.
Thanks
Enrico