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TM4C1294NCPDT: Use of ARM THUMB-2 instruction set

Part Number: TM4C1294NCPDT

I have started working on TM4C1294NCPDT micro controller , while going through the datasheet, i have come through with a statement which says 

"Additionally,
these microcontrollers use ARM's Thumb®-compatible Thumb-2 instruction set to reduce memory
requirements and, thereby, cost"

now i want to know how i can reduce memory requirements by using this feature??

2. I am writing my code in code composer v6.2.0 , please provide the required instruction to be included in c code to use this feature.

thanks in advance

  • Hello Salman

    This is a CCS compiler question.
  • Salman Khan said:

    "Additionally,
    these microcontrollers use ARM's Thumb®-compatible Thumb-2 instruction set to reduce memory
    requirements and, thereby, cost"

    now i want to know how i can reduce memory requirements by using this feature??

    You fell for a marketing euphemism.

    Actually, you cannot 'un-use' this 'feature', Cortex M controller can only execute Thumb/Thumb-II instructions. They are hard-faulting when coming across an ARM instruction. ARM instructions are the 'long', faster variant, supported by Cortex A etc.

  • Thank you so much sir for your reply,

    #1
    i have read somewhere that
    "
    ARM Core has two execution states –ARM and Thumb

    Switch between them using BX instruction
    "
    #2
    and then i came across with the keyword "asm" (to write inline assembly code in c)
    for e.g
    int main()
    {

    asm("some BX instruction(to switch to thumb-2 instruction)");

    }

    Is this a way? , or it is automatically done by the compiler every time i write a code and build it.??
  • Salman Khan said:
    i have read somewhere that
    "
    ARM Core has two execution states –ARM and Thumb

    But the Cortex M core has not. It only supports Thumb. The core will hardfault if you try to execute an ARM (non - Thumb-II) instruction.

    Check the arm.infocenter.com website for Cortex M4 technical reference manuals.