Hi Everyone,
I've been trying to receive SPI signals from my ADS1274EVM to the TM4C1294XL. To do this, I have configured the Falling Edge of the /DRDY signal from the ADC as the interrupt (at GPIO port F) for the microcontroller. While doing this, I found that the latency is unusually large, i.e. 6-7us, whereas it is supposed to be in the neighborhood of 1us (12 Cycles of a 120MHz system clock). I also set the interrupt priority to the highest, although it shouldn't make a difference as the GPIOF Interrupt is the only ISR I have defined. My code is given below, and I'd appreciate if anyone has any suggestions. Some code snippets and outputs from my Logic Analyzer are given below.
Setting Up GPIOF for Interrupts:
// Pin F4 setup for DRDY-Inverse
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF); // Enable port F
GPIOPinTypeGPIOInput(GPIO_PORTF_BASE, GPIO_PIN_0); // Init PF0 as input
// Interrupt setup
GPIOIntDisable(GPIO_PORTF_BASE, GPIO_PIN_0); // Disable interrupt for PF0 (in case it was enabled)
GPIOIntTypeSet(GPIO_PORTF_BASE, GPIO_PIN_0, GPIO_FALLING_EDGE); // Configure PF0 for falling edge trigger
GPIOIntClear(GPIO_PORTF_BASE, GPIO_PIN_0); // Clear pending interrupts for PF0
GPIOIntRegister(GPIO_PORTF_BASE, GPIOPortFIntHandler); // Register ISR for port F
IntPrioritySet(INT_GPIOF, 0); // Set Interrupt Priority Level
GPIOIntEnable(GPIO_PORTF_BASE, GPIO_PIN_0); // Enable interrupt for PF0
My Interrupt Service Routine for GPIOF
//Interrupt Service Routine (ISR) or Interrupt Handler
void GPIOPortFIntHandler(void)
{
//Clear the GPIO interrupt
GPIOIntClear(GPIO_PORTF_BASE, GPIO_INT_PIN_0);
//Fill the buffer elements one by one; collect 64 bits
SSIDataPut(SSI1_BASE, DummyData);
SSIDataGet(SSI1_BASE,&pui32DataRxBuffer[0]); //Get first 16 bits [111:96]
SSIDataPut(SSI1_BASE, DummyData);
SSIDataGet(SSI1_BASE,&pui32DataRxBuffer[1]); //Get second 16 bits [95:80]
//Add Block Below for 2 Channels
SSIDataPut(SSI1_BASE, DummyData);
SSIDataGet(SSI1_BASE,&pui32DataRxBuffer[2]); //Get third 16 bits [79:64]
SSIDataPut(SSI1_BASE, DummyData);
SSIDataGet(SSI1_BASE,&pui32DataRxBuffer[3]); //Get fourth 16 bits [63:48]
//Add Block Below for 3 Channels
SSIDataPut(SSI1_BASE, DummyData);
SSIDataGet(SSI1_BASE,&pui32DataRxBuffer[4]); //Get fifth 16 bits [47:32]
//Add Block Below for 4 Channels
SSIDataPut(SSI1_BASE, DummyData);
SSIDataGet(SSI1_BASE,&pui32DataRxBuffer[5]); //Get sixth 16 bits [31:16]
SSIDataPut(SSI1_BASE, DummyData);
SSIDataGet(SSI1_BASE,&pui32DataRxBuffer[6]); //Get seventh 16 bits [15: 0]
//Consolidate and concatenate the elements to get Channel 1 and 2
pui16DataRx0[counter] = ((uint16_t)(pui32DataRxBuffer[0]) << 1) | ((uint16_t)(pui32DataRxBuffer[1]) >> 15);
//pui16DataRx1[counter] = ((uint16_t)(pui32DataRxBuffer[1]) << 9) | ((uint16_t)(pui32DataRxBuffer[2]) >> 7);
//pui16DataRx2[counter] = ((uint16_t)(pui32DataRxBuffer[3]) << 1) | ((uint16_t)(pui32DataRxBuffer[4]) >> 15);
//pui16DataRx3[counter] = ((uint16_t)(pui32DataRxBuffer[4]) << 9) | ((uint16_t)(pui32DataRxBuffer[5]) >> 7);
//Counter Update
if(counter < INPUT_VECTOR_SIZE - 1) {counter++;} //Increment Counter as long as it's below 4999
else{counter = 0;} //Reset Counter to Zero if it is 4999
while(SSIBusy(SSI1_BASE)){}
}
Logic Analyzer Output
