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Tool/software: TI-RTOS
Hi,
I want to understand how the micro retains the application code after it has been programmed
(either through an FTDI or JTAG interface?)
Thanks,
Priya
Priya,
What do you mean it is locked out? Are you using the ROM-based UART bootloader or the flash-based UART bootloader?
You can configure the BOOTCFG register so that the bootloader will download your application firmware when your specified GIO pin changes state. Please refer to the datasheet for details.
Register 68: Boot Configuration (BOOTCFG), offset 0x1D0
Note: Offset is relative to System Control base address of 0x400F.E000.
Note: The Boot Configuration (BOOTCFG) register requires a POR before the committed
changes take effect.
This register is not written directly, but instead uses the FMD register as explained in “Non-Volatile
Register Programming-- Flash Memory Resident Registers” on page 613. When this register is
committed, the new value cannot be read back until after the power cycle. This register provides
configuration of a GPIO pin to enable the ROM Boot Loader as well as a write-once mechanism to
disable external debugger access to the device. At reset, the user has the opportunity to direct the
core to execute the ROM Boot Loader or the application in Flash memory by using any GPIO signal
from Ports A through H as configured by the bits in this register. At reset, the following sequence is
performed:
1. The BOOTCFG register is read. If the EN bit is clear, the ROM Boot Loader is executed.
2. In the ROM Boot Loader, the status of the specified GPIO pin is compared with the specified
polarity. If the status matches the specified polarity, the ROM is mapped to address 0x0000.0000
and execution continues out of the ROM Boot Loader.
3. If the EN bit is set or the status doesn't match the specified polarity, the data at address
0x0000.0004 is read, and if the data at this address is 0xFFFF.FFFF, the ROM is mapped to
address 0x0000.0000 and execution continues out of the ROM Boot Loader.
4. If there is data at address 0x0000.0004 that is not 0xFFFF.FFFF, the stack pointer (SP) is loaded
from Flash memory at address 0x0000.0000 and the program counter (PC) is loaded from
address 0x0000.0004. The user application begins executing.
Priya Nadathur said:In error, the FTDI interface was used to program stellaris code into the TM4C custom board. Is this likely to damage the board?
You are saying you programmed a stellaris code into the TM4C device, right? The Stellaris and TM4C are not compatible. I don't know what is your stellaris code? As far as physically damaging the board, I hope that is not the case. But will it brick the device, that is possible and cannot be ruled out. For example, your stellaris code somehow messed up the TM4C clock configuration resulting in running the frequency out of spec.
Priya Nadathur said:The FTDI pins are mixed up between the stellaris and TM4C.
Can you elaborate? What do you mean the FTDI pins are mixed up?
Anyway, do you have problem with one board only while all other boards are ok?
Charles,
Thank you for your reply. I don't have the schematic in front of me now, but I think the FTDI rx
and tx pins are in different order between the Stellaris and TM4C. System clock for Stellaris is
80 MHz and TM4C 120 MHz. At this time, only one TM4C board is available, more have been
ordered.If the MCU is bricked on this board, it can be replaced. Let me know if you have further
comments.
Thanks,
Priya