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Support Path: /Product/Help with Device Selection/
Hello,
I have a RM48L952 HDK board. Our product will be battery powered so we will run with a 40 MHz clock rate to save power. I configured HALCoGen for a HCLK = GCLK = PLL1 = 40 MHz. The CPU Clock and peripherals are also set to 40 Mhz. I built the code and added a FOR loop that counts to 100,000 then toggles an LED. The LED toggles every 40 mS. I have interrupts disabled for this test. I looked at the assembly code produced for this loop (shown below). There are a total of 9 opcodes executed while counting from 0 to 100,000.
My question: 9 opcodes x 100,000 in 40 mS results in about 22,500,000 instructions per second. But the RM48L9xx is advertised to run at 1.66 DMIPS/MHz. So I would expect about 66,000,000 instructions per second (1.66 x 40 MHz) and my loop should execute almost 3 times faster.
Is there some RM48L952 clock output on the HDK board that I can look at to see if the IC is actually running at 40 MHz? The code is running from internal FLASH, so the external memory bus is not active. What else can I look at to verify that I am actually running at 40 MHz?
Thank you,
Keith
============ for (i=0; i< 100000; i++)
$C$L61:
000189dc: E59F0144 ldr r0, [pc, #0x144]
000189e0: E590C000 ldr r12, [r0]
000189e4: E28CC001 add r12, r12, #1
000189e8: E580C000 str r12, [r0]
67 if (idleCount > 100000) {
000189ec: E59FC134 ldr r12, [pc, #0x134]
000189f0: E59F0134 ldr r0, [pc, #0x134]
000189f4: E59CC000 ldr r12, [r12]
000189f8: E150000C cmp r0, r12
000189fc: 2AFFFFF6 bhs $C$L61
QJ,
When I use the debugger to break into the code when running, the FRDCNTL register value is displayed = 0 (no wait states.) Can you explain my measured execution time assuming 0 wait states and a 40 MHz cpu clock? What to look at next?
Also, I am not able to change the FRDCNTL register value from within the debugger, do you know how to do it? The console message is:
CortexR4: Trouble Writing Memory Block at 0xfff87000 on Page 0 of Length 0x4: (Error -1065 @ 0x0) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 7.0.100.0).
thanks,
QJ,
I am running a single FreeRTOS task (code attached.) Compiler optimization is off. I measure the delay by toggling a LED on the HDK board. In a different test I also disabled interrupts (entered a critical section) inside the task, before starting the loop. No difference in loop timing with interrupts disabled.
QJ,
Are you running on a Hercules HDK devboard? Can you post the full CCS project/files? I'd like to check your Halcogen & compiler settings.
thanks,
1. There are 3 functions in sys_main(): main(), test_add32_10(); test_add32_20()
2. add32_10(): 10 add or sub instructions; test_add32_20(): 110 add or sub instructions
3. The purpose is to get rid of the overhead