• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 29 subscribers
  • Views 252 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Original question:

RM48L950: Migrating from RM46xx to RM48xx

RM48L950: RM48xx errata clarification

paddu2017
Expert 2885 points
Part Number: RM48L950

Hi,

Could you please clarify below question on RM48xx's new errata.

1.CORTEX-R4#54: mentions that Code Composer Studio utilizes Halt-mode (not Monitor-mode) to debug Hercules
so this won't be a problem when we use CCS... but does this applies for IAR also?
Could you please let me if there is any info about this errata when we use IAR.

2.DMM#16: we don't understand how much effect this errata would cause for normal debug.
Does normal debugging mode without any trace feature use this module? And should we care about
this errata if we don't use any tracing or RTP features?

Best Regards
paddu

  • 0
    TI__Mastermind 49120 points
    Hi,

    The debug mode can be switched between monitor-mode and halt-mode using a debug control register inside the CPU, so all debuggers are allowed to choose the mode they prefer. That said, monitor-mode is less likely to be used as this causes actual prefetch and data abort exceptions when a debug event occurs (watchpoint match). The halt-mode makes the CPU enter a debug state in which it halts normal code execution and lets the user control program flow via the debugger. In my experience, IAR debugger also uses the halt-mode. You will need to confirm this with IAR.

    Do you use the DMM module to actually modify memory locations in the device's memory map? If not, then this erratum does not apply to you.

    Regards,
    Sunil