Hi QJ,
In an earlier E2E post you said:
https://e2e.ti.com/support/microcontrollers/hercules/f/312/p/675212/2485766#2485766
The 7.8.4 Implicit read: This is to detect and correct the single bit flips and double bit flips in critical system-wide settings stored in OTP when they are read from OTP immediately after reset. When the L2FMC is out of reset, it reads multiple OTP locations to configure various system-wide settings. All the read data goes through a SECDED checker to ensure any single bit errors are corrected and double bit errors are detected.
Question 1:
Can you clarify what these system wide settings are? Are these some restricted locations or is it customer accessible? How many locations are read for implicit read starting at 0xF0080140?
Question 2:
The customer is trying to understand the benefit of doing SECDED DIAGMODE=7 testing if L2FMC diag testing is also being done. Does the SECDED testing as described in 7.8.4 do any additional testing that may not be covered by L2FMC (tests 1 and 2 as shown below)?
I) 7.6 Deliberate ECC Errors for FMC ECC Checking - Read from single and double-error OTP and verify SEC and expected ESM faults.
2) 7.8.2.2 ECC Data Correction Diagnostic Mode 7: Manipulate the data and/or ECC to verify SEC and expected ESM faults.
Question 3:
The SECDED diag documentation says the following:
1. CPU reads the 64bit memory location of the implicit read. For example, implicit read location is at 0xF008_0140.
2. Next, CPU reads the memory mapped registers RCR_VALUEx registers accessible at address offsets D0h and D4h.
3. The two 64bit values read in steps 1 and 2 are compared for being equal.
4. If the two values are equal then the location in memory after correction by the CPU SECDED is the same value as location in memory after correction by L2FMC SECDED. Assuming the CPU SECDED can be independently verified, the L2FMC SECDED must be functioning correctly.
5. If the two values are not equal, then L2FMC SECDED is not functioning correctly.
In step 2, RCR_VALUEx will hold the results of presumably the last L2FMC implicit read. So, the step 4 conclusion that the L2FMC SECDED is functioning correctly is based on only 1 implicit read result being checked. Is that correct? If that did not have any error then we are concluding that the L2FMC is functioning correctly? Is this a good enough assessment for L2FMC SECDED? What is our recommendation?
Thanks!
