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Original question:

Running functions from RAM

Compiler/TMS570LC4357: Executing from SRAM in Bootloader.

Ulf Samuelsson42
Prodigy 175 points
Part Number: TMS570LC4357
Other Parts Discussed in Thread: HALCOGEN

Tool/software: TI C/C++ Compiler

Trying to make something useful out of the bootloader I found in:

https://e2e.ti.com/support/microcontrollers/hercules/f/312/t/735341?Compiler-TMS570LC4357-Boot-loader-LC43x

This will allocate 2 MB for the Bootloader which makes it useless.

I plan to allocate 48 kB initially, using the first 3 x 16 kB sectors of Flash 0.

I cannot program the flash and execute code from the same flash, to the plan is to start from flash
and use ramfuncs.

I declare a number of functions to execute from RAM.:

__attribute__((ramfunc))  void f(void) { ... }

Set the compiler to add the switch "--ramfunc=on"

In the Linker command file I set:

MEMORY {

  ...

    RAMFUNC (RWX): origin=0x08070000 length=0x00010000

  ...

}

SECTIONS {
  ...
    .binit  align(32) : {}                        > FLASH0
    .status align(32) : { __APP_STATUS_ADDRESS = .; }            > STATUS
    .app    align(32) : { __APP_START_ADDRESS = .; }            > APP0 | APP1
    .TI.ramfunc align(32) : {} load=FLASH0, run=RAMFUNC, table(BINIT) 
  ...
}

In the map file, I get the .TI.ramfunc section

*          0    00000040    00006470     RUN ADDR = 08070000
                  00000040    00000af0     HL_sci.obj (.TI.ramfunc)
            ...
I also get a .binit section with a copy table

.binit     0    00007c40    00000010     
                  00007c40    00000010     (.binit)

LINKER GENERATED COPY TABLES

__TI_cinit_table @ 00007c30 records: 2, size/record: 8, table size: 16
    .data: load addr=00007c00, load size=00000015 bytes, run addr=08001500, run size=00000431 bytes, compression=lzss
    .bss: load addr=00007c28, load size=00000008 bytes, run addr=08001940, run size=000000c8 bytes, compression=zero_init
binit @ 00007c40 records: 1, size/record: 12, table size: 16
    .TI.ramfunc: load addr=00000040, load size=00006470, run addr=08070000, run size=00006470, compression=none

I can see that the ramfunc symbols are defined in RAM

08070000  sciInit                             
080701d4  sciSetFunctional                    
080701f4  sciSetBaudrate                      
08070290  sciIsTxReady                       

Have a few questions:

  • WHERE are the ramfuncs copied from Flash into SRAM?
    • Do I need to do the copy in the application?
  • Can the compiler generate code which calls the F021_API_CortexR4*.lib ?
    • If so, how do I make sure that all such F021 code runs from SRAM?
  • The Bootloader uses the RTI, but the RTI code and all other HALCoGen generated code should not run from flash.
    • It should be possible to specify that interrupt handlers are RAMFUNCs in HALCoGen
    • Is there an example where you replace an interrupt handler in the VIM?

  • 0
    TI__Guru**** 196116 points
    Hello Ulf,

    1. The ramfuncs will be copied to SRAM automatically. You don't need to copy in your application.
    2. I don't understand this question. I don't think the compiler can generate code to call F021 APIs.
    3. The HALCoGen doesn't contain this feature. We have to add __attribute__((ramfunc)) or #pragma CODE_SECTION(func, ".TI.ramfunc") before the ISR manually. Then add " .TI.ramfunc align(32) : {} load=FLASH0, run=RAMFUNC, table(BINIT)" to CMD file.

    I don't have example code to place ISR to SRAM.
  • 0 in reply to QJ Wang
    Prodigy 175 points

    I still want to know what subroutine contains the code which copies the RAMFUNCs to ram?

    I found the "copy_in" routine, which is some examples call in "main" to copy stuff into RAM.

    If I grep the Project, I cannot find and reference, except the actual copy_in routine.

    I also search for the __binit__ symbol which is automatically defined when you use RAMFUNCs.

    I do not see that anything is using the __binit__.

    So, I repeat the question:

    • Where is the code which copies the RAMFUNCs to RAM?
      I want to understand fully how this works.
    • OK, A little study indicates that this is probably done inside "__TI_auto_init"
      which is not present in the Project, but inside "rtsv7R4_T_be_v3D16_eabi.lib"
      which is inside the CCS directory structure.

    =============

    OK, Even if the compiler does not generate calls to the F021 library, the bootloader does.

    I am using the TMS570LC4375 bootloader that you wrote.

    This calls the F021 library as the core functionality in the flash programming.

    I do not Think it is good that this is situated in Flash.

    • How do I setup the linker so that F021 library is linked to RAM?
    • Alternatively, is the F021 source code available?

    =============

    When I point out that HALCoGen does not support RAMFUNCs,
    I would like you to provide feedback to the team responsible for HALCoGen,
    that this is a functionality they should consider.

    • Please provide this idea to the HALCoGen team.

    =============

    HALCoGen generated code does not normally support user code between functions.
    This means that adding "__attribute__((ramfunc))" Before such functions
    is normally not possible.

    Interrupt functions may be different. I generated RTI interrupts 0 & 1, and then
    there was an ability to add user code between and after each interrupt routine,
    so I think that is solved. I do think it should be possible to add code before and after each HALCoGen generated function.

    • Please talk to the HALCoGen team about user code BETWEEN functions.

  • 0 in reply to Ulf Samuelsson42
    TI__Guru**** 196116 points

    Hello Ulf,

    The file you are looking for is in C:\ti\ccsv8\tools\compiler\ti-cgt-arm_18.1.1.LTS\lib\src\autoinit.c. There is a function AUTO_INIT() and in the file autoinit.h you can fund a #define AUTO_INIT __TI_auto_init.

    We don't have the F021 source code. 

    I will forward your suggestions to HALCoGen team. Thanks

  • 0 in reply to QJ Wang
    Prodigy 175 points
    OK, I figured out that I can do the following in the linker:

    .TI.ramfunc align(32) : { ../lib/F021_API_CortexR4_BE_L2FMC.lib(.text) } load=FLASH0, run=RAMFUNC, table(BINIT)

    This will put the ".text" segment of the F021 library into SRAM, which hopefully should be enough.

    Everything needs to be tested of course.