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CCS/RM48L952: RM48L952-LWIP Design for DP83848

user5269270
Intellectual 705 points
Part Number: RM48L952
Other Parts Discussed in Thread: DP83640, HALCOGEN

Tool/software: Code Composer Studio

Hi,

we are using LWIP design version lwip_demo_v02. (TCP/IP) for DP83640 from this link.

http://processors.wiki.ti.com/index.php/HALCoGen_Ethernet_Driver_and_lwIP_Integration_Demonstration

.

what change i have to make for supporting the LWIP design in DP83848.

we need to configure rmii mode. we are waiting for the reply.

  • 0
    TI__Guru**** 192806 points
    Hello,

    You need to change the PHY Id to match the DP83640 Precision PHYTER on the launchpad.

    #undef DP83640_PHY_ID
    #define DP83640_PHY_ID (0x20005CE1u)

    Add those to your dp83640.h
  • 0 in reply to QJ Wang
    Intellectual 705 points

    7608.Ethernet working code for RMII MASTER in DP83640.rarHi,

    Thanks for your reply.

    i changed ID for DP83848 in

    #undef DP83848_PHY_ID

    #define DP83848_PHY_ID (0x20005C90)

    but  etharp_gratuitous ARP is not happening.

    I uploaded working RMII MASTER Mode-->TCP/IP code for DP83640 is fine. but presently we are using DP83848 it doesn't have RMII master mode .so i changed to RMII slave but etharp_gratuitous ARP is not happening . Please Suggest what change for DP83848.

    Signal Status of DP83848 :

    1) RMII CLK as 50MHz(input).

    2) PFBOUT,PFBIN1 &PFBIN2 - 1.76V.

    3) TXD_2 & TXD_3 grounded.

    4) RX_DV/MII_MODE - connected to Pullup resistor.( during RESET this pin high , after that  it is becoming Low).

    5) RX_ER/MDIX_EN- Pullup resistor removed.

    6) CRS/CRS_DV/LED_CFG - Pullup resistor removed.

    7) Reset is taking nearly 200ms.

    8) RBIAS- 1.23V.

    Status of Register in DP83848 . i uploaded in doc file7875.Ethernet_PHY_DEVICE_REGISTER_STATUS_APM.docx

    i have uploaded Schematic for DP83848.

    what is Difference between RMII MASTER & RMII SLAVE? .

     what change i have to make.we are waiting for your reply .

     

  • 0 in reply to user5269270
    TI__Guru**** 192806 points
    Hello,

    The Ethernet PHY used on HDK is DP83640. I am not familiar to another PHY.
  • 0 in reply to QJ Wang
    Intellectual 705 points

    Hi,

    There was problem in hardware issue. It is solved. It is working fine.

    Thanks for your reply and support.

    Difference between RMII master and RMII slave?

  • 0 in reply to user5269270
    TI__Guru**** 192806 points
    Hello,

    The standard RMII requires an external 50MHz oscillator as RMII reference clock. In RMII master mode, 50 MHz Oscillator is replaced with a 25 MHz OSC or crystal. The PHY takes the 25 MHz input and generates the 50 MHz clock for use by itself, the EMAC, and the RMII slave.

    In a system comprising a three MAC functions plus three DP83640 devices, one PHY operates as the clock master and outputs the 50 MHz RMII reference clock on three separate pins. This allows the second and third PHYs in 50 MHz Slave Mode to use the same RMII reference clock as the 25 MHz Master PHY, thereby allowing synchronous data transfer from all three PHYs to all three MACs. It is evident that this system uses only a single 25 MHz crystal clock source, thus saving the expense of three 50 MHz oscillators or several clock buffers.