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TM4C1294KCPDT: Trouble porting USB code from TM4C129x development board to custom TM4C1294KCPDT board

Part Number: TM4C1294KCPDT

I have USB code that has been running well on a TM4C129x development board, but which doesn't work on our custom TM4C1294KCPDT based board.

The immediate issue is that I'm not getting SOF interrupts. I do get suspend and reset interrupts.

The hardware seems to be correct. If I erase the processor flash the system comes up as a Stellaris Firmware Update device in device manager.

I assume there is a configuration difference between the TM4C129XNCZADI on the dev kit and the TM4C1294KCPDT on our board, but I can't find anything that looks likely.

Where should I look for the cause of this issue?

  • Hi Peter,
    Our USB expert is on travel so the response may be delayed. In the meantime i will suggest you try the below.

    1. Check if the SOF bit in the USBIE register is enabled to cause the start of frame interrupt
    2. There are a few TivaWare USB examples. Can you try them on both the development board and then your custom board? If they work on the development board but not your custom board then it will lead me to think the problem is related to the board. Are you getting SOF interrupts in these TivaWare examples running on your custom board?
    3. Do you have USB analyzer to monitor the traffic between the host and the device? Is the host sending out the proper SOF?
    4. When you are not getting the SOF interrupt, can you check the USB status registers and see if you are getting any errors?
  • Hi Charles,

    thank you for the reply. I had a long reply here which I'd been working up all day. However, in the process of investigation while writing the reply I've "solved" the problem!

    It turns out that an update to sysctl.c between TivaWare_C_Series-2.0.1.11577 and TivaWare_C_Series-2.1.4.178 has messed up the USB clock in some fashion. The clue was the note for RESUME bit in USB_IS which says:

    "This interrupt can only be used if the USB controller's system clock is enabled. If the user disables the clock programming, the USBDRRIS, USBDRIM, and USBDRISC registers should be used."

    which pointed me at looking closer to the system clock configuration. I found that details of the PLL setup differ between the two systems. The debug serial port works correctly on both systems which implies the system clock is running at 120 MHz as expected so I hadn't considered clock configuration previously.

    Copying the 2.0.1.11577 version of sysctl.c into my 2.1.4.178 based build and making the minor changes required for it to compile has fixed the problem. Our custom board now comes up correctly as a USB device.

    There is still a mystery as to why the different PLL configuration has messed up USB. I suspect there may be a clock jitter issue with the new configuration, but I haven't confirmed that.

    Cheers, Peter