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In my SRAM address parity test RAMERRSTATUS is set for both B1 and B2 as expected when I inject parity error, but there is no ESF10 and ESF12 bits set in the ESMSR1. I do esmInit() on startup. Is there anything else I need to do to allow this error to be flagged to the ESM? Do I need to do anything with the VIM for this?
Hello,
RAM even bank (B0TCM) - address bus parity error and RAM odd bank (B1TCM) - address bus parity error are assigned to Group2 Channels 10 and 12.
Status register dedicated to Group2 is ESM Status Register 2 (ESMSR2).
Best regards,
MIro