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Hi,
From my earlier ticket with TI (refer to: https://e2e.ti.com/support/legacy_forums/hirel/f/935/t/536319), interrupts can be nested. I tried to nest IRQ interrupt by setting the 'I' bit in CSPR register to 0. I confirmed that the same interrupt was hitting again (nesting), but this was corrupting the stack. Once the ISR was complete it would crash. From the earlier ticket Anthony mentioned about pushing LR and SPSR onto stack in order to avoid corrupting the stack. Can you please provide an example of this?
Pinakin
