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TMS570LS3137: Driver for connecting S29GL256S10 NOR Flash to TMS570LS3137

Part Number: TMS570LS3137

Hello, 

I need the NOR flash driver for connecting EMIF Parallel interface S29GL256S10DHV020 (32MB) NOR Flash to TMS570LS3137  connected  to the chip select  S_EMIF_nCS2 .

https://img.ozdisan.com/ETicaret_Dosya/499553_8547283.pdf

From the data sheet how do we derive values for the following 

/** @fn void emif_ASYNC1Init(void)

* @brief Initializes the emif Driver for ASYNC memories
*
* This function initializes the emif driver for Asynchronous memories like Nor and Nand Flashes,Asynchronous RAM.
*/
/* SourceId : EMIF_SourceId_002 */
/* DesignId : EMIF_DesignId_002 */
/* Requirements: HL_SR335 */
void emif_ASYNC1Init(void)
{
/* USER CODE BEGIN (4) */
/* USER CODE END */
emifREG->CE2CFG = 0x00000000U;
emifREG->CE2CFG = (uint32)((uint32)0U << 31U)|
(uint32)((uint32)1U << 30U)|
(uint32)((uint32)15U << 26U)|
(uint32)((uint32)63U << 20U)|
(uint32)((uint32)7U << 17U)|
(uint32)((uint32)15U << 13U)|
(uint32)((uint32)63U << 7U)|
(uint32)((uint32)7U << 4U)|
(uint32)((uint32)0U << 2U)|
(uint32)((uint32)emif_8_bit_port);

emifREG->AWCC = (emifREG->AWCC & 0xC0FF0000U)|
(uint32)((uint32)emif_pin_high << 29U)|
(uint32)((uint32)emif_pin_low << 28U)|
(uint32)((uint32)emif_wait_pin0 << 16U)|
(uint32)((uint32)0U);

emifREG->PMCR = (emifREG->PMCR & 0xFFFFFF00U)|
(uint32)((uint32)0U << 2U)|
(uint32)((uint32)emif_4_words << 1U)|
(uint32)((uint32)0U);
/* USER CODE BEGIN (5) */
/* USER CODE END */
}

/** @fn void emif_ASYNC2Init(void)
* @brief Initializes the emif Driver for ASYNC memories
*
* This function initializes the emif driver for Asynchronous memories like Nor and Nand Flashes,Asynchronous RAM.
*/
/* SourceId : EMIF_SourceId_003 */
/* DesignId : EMIF_DesignId_002 */
/* Requirements: HL_SR335 */
void emif_ASYNC2Init(void)
{
/* USER CODE BEGIN (6) */
/* USER CODE END */

emifREG->CE3CFG = 0x00000000U;
emifREG->CE3CFG = (uint32)((uint32)0U << 31U)|
(uint32)((uint32)1U << 30U)|
(uint32)((uint32)15U << 26U)|
(uint32)((uint32)63U << 20U)|
(uint32)((uint32)7U << 17U)|
(uint32)((uint32)15U << 13U)|
(uint32)((uint32)63U << 7U)|
(uint32)((uint32)7U << 4U)|
(uint32)((uint32)0U << 2U)|
(uint32)((uint32)emif_8_bit_port);

emifREG->AWCC = (emifREG->AWCC & 0xC0FF0000U)|
(uint32)((uint32)emif_pin_high << 29U)|
(uint32)((uint32)emif_pin_low << 28U)|
(uint32)((uint32)emif_wait_pin0 << 18U)|
(uint32)((uint32)0U);

emifREG->PMCR = (emifREG->PMCR & 0xFFFF00FFU)|
(uint32)((uint32)0U << 10U)|
(uint32)((uint32)emif_4_words << 9U)|
(uint32)((uint32)1U << 8U);
/* USER CODE BEGIN (7) */
/* USER CODE END */

}


/** @fn void emif_ASYNC3Init(void)
* @brief Initializes the emif Driver for ASYNC memories
*
* This function initializes the emif driver for Asynchronous memories like Nor and Nand Flashes,Asynchronous RAM.
*/
/* SourceId : EMIF_SourceId_004 */
/* DesignId : EMIF_DesignId_002 */
/* Requirements: HL_SR335 */
void emif_ASYNC3Init(void)
{
/* USER CODE BEGIN (8) */
/* USER CODE END */

emifREG->CE4CFG = 0x00000000U;
emifREG->CE4CFG = (uint32)((uint32)0U << 31U)|
(uint32)((uint32)0U << 30U)|
(uint32)((uint32)15U << 26U)|
(uint32)((uint32)63U << 20U)|
(uint32)((uint32)7U << 17U)|
(uint32)((uint32)15U << 13U)|
(uint32)((uint32)63U << 7U)|
(uint32)((uint32)7U << 4U)|
(uint32)((uint32)0U << 2U)|
(uint32)((uint32)emif_8_bit_port);

emifREG->AWCC = (emifREG->AWCC & 0xC0FF0000U)|
(uint32)((uint32)emif_pin_high << 29U)|
(uint32)((uint32)emif_pin_low << 28U)|
(uint32)((uint32)emif_wait_pin0 << 20U)|
(uint32)((uint32)0U);

emifREG->PMCR = (emifREG->PMCR & 0xFF00FFFFU) |
(uint32)((uint32)0U << 18U)|
(uint32)((uint32)emif_4_words << 17U)|
(uint32)((uint32)0U << 16U);

/* USER CODE BEGIN (9) */
/* USER CODE END */
}

/* USER CODE BEGIN (10) */
/* USER CODE END */

Thanks,

  • Hello Chandren,

    The NOR flash is totally different from SRAM in reading/writing/erasing. You can not read or write a value from/to a memory address directly. You need to issue a read/write or erase command first, then data.

    Please refer to the command tables in the datasheet

  • Good Day Mr. Q J Wang ,

    Can you send me the entire CCS project that you have working for  S29Gl512N - 110 ns - 64 MBytes  that you discussed in following thread with NORflash.c NORflash.h and also emif.c emif.h . 

    I referring to your post on E2E https://e2e.ti.com/support/microcontrollers/hercules/f/312/t/712728?CCS-RM57L843-NOR-Flash-read-and-write .

    I am using the NORflash.c file , I see your signature .

    /*
    * NOR Flash Code
    * By QJ Wang
    * March 19, 2012
    */

    We are working with larger application size of 6 MB so we needed S29Gl512N 32 MB NOR FLASH to store the application  .

    On our board we provided 64 MB EMIF SDRAM and 32 MB EMIF NOR FLASH . I am using NOR FLASH to Load and store the Application ( like Hard Disk ), to run or execute I load contents of 32MB NOR FLASH  to SDRAM and Execute from SDRAM . 

    I am using same chip as you discussed and implemented for S29Gl512N  .

    I am using the attached NOR FLASH Driver .c that is available on E2E  . But I am unable to find the norFlash.h file for the same  .

    I understand the NOR flash is different from SDRAM chip . And access mechanism is also different .

    I am also following the thread 

    https://e2e.ti.com/support/microcontrollers/hercules/f/312/p/731212/2701876?tisearch=e2e-sitesearch&keymatch=NOR%20Flash%20Code#2701876 to implement the same and test the NOR FLASH .

    5224.Boot_NORFlash.c

    Additionally I executing following API procedure MENTIONED BELOW , I am using NOR Flash Command Summary as in the following document .

    7115.CYPRESS NOR FLASH COMMAND SUMMARY.pdf

    uint16_t FLASH_write( uint32_t src, uint32_t dst, uint32_t length )
    {
    uint32_t i;
    uint8_t* psrc8;
    uint16_t* pdst16;

    uint8_t extra_byte_to_write;
    uint16_t full_word_to_write = 0;
    uint8_t* lower_byte_to_write = ( uint8_t* )( &full_word_to_write );
    uint8_t* upper_byte_to_write = ( uint8_t* )( &full_word_to_write + 1 );

    /* Align to 16-bit Flash memory */
    if ( ( dst & 1 ) == 1 )
    {
    *lower_byte_to_write = *( uint8_t* )( dst - 1 );
    *upper_byte_to_write = *( uint8_t* )( src );
    FLASH_write( ( uint32_t )&full_word_to_write, dst - 1, 2 );
    dst = dst + 1;
    src = src + 1;
    length = length - 1;
    }

    /*
    * Align to 8 or 16 bits
    */
    extra_byte_to_write = length & 1;

    psrc8 = ( uint8_t* )src;
    pdst16 = ( uint16_t* )dst;
    length &= 0xFFFFFFFE;
    for ( i = 0 ; i < length ; i += 2 )
    {
    /*
    * Read the 16-bit source data as 2 x 8-bit bytes.
    * This seems rather odd, but avoids any paging problems when
    * data is across multiple cache pages and the MMU is active.
    */
    full_word_to_write = *psrc8 | ( *( uint8_t* )( psrc8 + 1 ) << 8 );
    psrc8 += 2;

    /* Program one 16-bit word */
    FLASH_CTL555 = FLASH_CMD_AA;
    FLASH_CTL2AA = FLASH_CMD_55;
    FLASH_CTL555 = FLASH_PROGRAM;
    *pdst16 = full_word_to_write;

    /* Wait for programming to complete */
    if ( _FLASH_waitWhileProgramming( ( uint32_t )pdst16, full_word_to_write, timeout ) )
    return -1;

    pdst16++;
    }

    /* Align 16-bit SRC last */
    if ( extra_byte_to_write == 1 )
    {
    *lower_byte_to_write = *psrc8;
    *upper_byte_to_write = ( *pdst16 ) >> 8;
    FLASH_write( ( uint32_t )&full_word_to_write, ( uint32_t )pdst16, 2 );
    }

    /*
    * Set to Read Mode
    */
    FLASH_BASE_PTR8 = FLASH_RESET;

    return 0;
    }

    uint16_t FLASH_read( uint32_t src, uint32_t dst, uint32_t length )
    {
    uint32_t i;
    uint16_t* psrc16 = ( uint16_t* )src;
    uint16_t* pdst16 = ( uint16_t* )dst;

    /*
    * Set to Read Mode
    */
    FLASH_BASE_PTR8 = FLASH_RESET;

    /*
    * Read Data to Buffer
    */
    for ( i = 0 ; i < length ; i += 2 )
    *pdst16++ = *psrc16++;

    return 0;
    }

    void program_word()
    {
    uint16_t *base_addr = (uint16_t *)0x60000000;
    uint16_t *pa = (uint16_t *)0x60000100;
    uint16_t data = 0x1234;

    *( (uint16_t *)base_addr + 0x555 ) = 0x00AA; /* write unlock cycle 1 */
    *( (uint16_t *)base_addr + 0x2AA ) = 0x0055; /* write unlock cycle 2 */
    *( (uint16_t *)base_addr + 0x555 ) = 0x00A0; /* write program setup command */
    *( (uint16_t *)pa ) = data; /* write data to be programmed */

    }

    void program_word_one()
    {
    uint16_t *base_addr = (uint16_t *)0x60000000;
    uint16_t *pa = (uint16_t *)0x60000100;
    uint16_t data = 0x1234;

    *( (uint16_t *)base_addr + 0xAAA ) = 0x00AA; /* write unlock cycle 1 */
    *( (uint16_t *)base_addr + 0x554 ) = 0x0055; /* write unlock cycle 2 */
    *( (uint16_t *)base_addr + 0xAAA) = 0x00A0; /* write program setup command */
    *( (uint16_t *)pa ) = data; /* write data to be programmed */
    }

  • Hi Chandre,

    You opened another thread for NOR flash question, I replied your question in that thread. I will close this thread. Thanks

  • Hi Mr. Q J Wang , 

    Thanks again for all the Solutions you suggested that helped in resolving the NOR Flash implementation issues .

    Appreciate taking time and for your support on the issue .

    For any one looking for a solution on EMIF NOR FLASH interface , please follow thread mentioned below. 

    The issue is now resolved by having correct MPU settings as DEVICE for CS2 address 0x60000000 to 0x61FFFFFF (32 MB).

    Thanks & Warm Regards