Compiler/RM57L843: LCF CRC Algorithim to match Safety Library

Code for question...

LCF Section directive

.text    : {} palign=8, crc_table(_my_crc_table, algorithm=TMS570_CRC64_ISO) > FLASH0 | FLASH1

Runtime Check

retVal = ( _my_crc_table.recs[i].crc_value ==  SL_CRC_Calculate((uint64*)_my_crc_table.recs[i].addr,_my_crc_table.recs[i].size / 8u) );

Hello,

I don't think you need to swap the word for RM57 which is little endian device. For RM57, the lower 32-bit word is stored in lower portion of the address:

uint64 value = 0x0123456789abcdef; the assume the address for this 64-bit word is 0x08001500

0x89abcdef is store in 0x08001500

0x01234567 is stored at 0x08001504

The value returned from the SL_CALC_CRC() function is returned in the reverse order from the table generated by the linker.  In the below images you can see (a) the RO and R1 registers storing the return value, (b) the memory storage location for the linker table and (c) a printf output of both values using %llx.  After searching the forum a bit more, I found a few posts from years ago seeming to reference this, but no solution listed that uses the standard link file directive.

https://e2e.ti.com/support/microcontrollers/hercules/f/312/t/339833?TMS570-CRC64-ISO

http://e2e.ti.com/support/microcontrollers/hercules/f/312/p/104764/785765.aspx#785765

(A)

(B)

(C)

Thanks Matt. 

I knew that swapping word is required for TMS570, but this is not applied to RM57 device. 

Anyway, I will a test later.

I think this note... http://downloads.ti.com/docs/esd/SPNU118/a-note-on-the-tms570-crc64-iso-algorithm-stdz0756196.html says that the device registers are little endian, but it expects my compiler to be set for big endian.  Based on the initial code samples I was using, I have the compiler set for little endian.  Is this not the typical scenario for the RM57?

Thank-you,

Matt