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Original question:

TM4C123GH6PZ: can interrupt routine example for TM4C123GH6PZ

TM4C123GH6PZ: about can interrupt

Yao Aili
Intellectual 330 points
Part Number: TM4C123GH6PZ

Hi TI：

    About can interrupt：

    CANIntEnable(CAN0_BASE, CAN_INT_MASTER | CAN_INT_ERROR | CAN_INT_STATUS);

    when CAN_INT_STATUS is enabled, and when there is a packet received, there will be two interrupts, one is CAN_INT_INTID_STATUS interrupt, when i check this, it show CAN_STATUS_RXOK; and another interrupt for CANRXOBJECT, this will trigger receive process;

   so I disable the CAN_INT_STATUS, will this affect the can interface to function normally?

   when i test this configuration, sometimes the cpu will receive a CANRXOBJECT interrupt and the received packet with can data length 0,  a flag 0x10a, is this a normal process?

   when i disbabled the CAN_INT_STATUS, i also disabled LEC interrupt, so when LEC happens, it will trigger a  receive interrupt?

   Thanks

----Yaoaili

  • 0
    TI__Guru 72500 points

    Yao Aili said:
    so I disable the CAN_INT_STATUS, will this affect the can interface to function normally?

    You can operate properly with just CAN_INT_MASTER and CAN_INT_ERROR.

    Yao Aili said:
     when i test this configuration, sometimes the cpu will receive a CANRXOBJECT interrupt and the received packet with can data length 0,  a flag 0x10a, is this a normal process?

    A packet with 0 length is valid. If that was what was sent, then that is what you should be receiving.

    Yao Aili said:
     when i disbabled the CAN_INT_STATUS, i also disabled LEC interrupt, so when LEC happens, it will trigger a  receive interrupt?

    No, issues that generate a LEC code cause the hardware on a CAN bus to re-transmit the message which generated the error. It is not necessary for the CPU to intervene.