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TMS570LC4357: Hercules™︎ safety microcontrollers forum

user5256101
Prodigy 70 points
Part Number: TMS570LC4357
Other Parts Discussed in Thread: HALCOGEN

Hi Sir/Madam,

I have a problem about mibSPI transfer groups. I have read a lot of problems and solutions about the issue in site but i could not solve my probem.

Shortly, i can use TG0,TG1,TG2 and TG3 in mibSPI5 section. I have two device, Q1 and Q2. My host microcontroller TMS570LC4357 is in master mode and communicates over SPI with Q1 and Q2. In Halcogen, TG0 and TG2 is used for Q1; TG1 and TG3 is used for Q3. TG0 and TG1 works well. Moreover i can send 72 byte from my microcontroller to Q1 using TG2 and i can read 42 byte from Q2 device using TG3.

Problem starts here. When i try to send 72 byte from host microcontroller to Q2 by using TG4, my code stucks in "while(mibspiIsTransferComplete(mibspiREG5,4)==0);" . According to my experiments, I noticed something interesting happened. When i clear (make zero) all the length values of the TG0,1,2,3 and make only TG4 length as 72, I see that the code is not stuck in "while(mibspiIsTransferComplete(mibspiREG5,4)==0);" , the code can continue. 

Why other TG's are affecting the TG4? Are the transfer groups somehow linked? How can i solve my problem?  Thank you in advance..

  • 0
    TI__Guru**** 193226 points

    Hello,

    MibSPI5 on TMS570LC43x device has only 128 buffers. 

  • 0 in reply to QJ Wang
    Prodigy 70 points

    Hello Dear Wang,

    First of all thank you for answering and trying to help. Yes, after your determination, I searched which MibSPI i can use in my application. In datasheet, it states that only MibSPI1 has 256 buffers. After that i configured mibSPI1 but my problem did not solved. I experienced the same thing again 

    Part of the datasheet:

    Note: For MibSPI1 that supports 256 buffers (values from 0-FFh), bit 15 is used. For MibSPI2-5 that support 128 buffers (values from 0-7Fh), bit 15 is reserved.

  • 0 in reply to user5256101
    TI__Guru**** 193226 points

    You are right. The MibSPI1 on TMS570LC43x device supports up to 256 buffers. To enable this feature, please write 0xA to EXTENDED_BUF_ENA bits of MIBSPIE register.

    By default, the EXTENDED_BUF_ENA is 0x05.

  • 0 in reply to QJ Wang
    Prodigy 70 points

    Thank you sooo much :) This resolved my issue.