TMS320F28388D: Bus Contention

Hello, 

I am using F28388D controller, i have a question on the bus contention for this controller between CPU1 and CPU2 for Peripherals Fame 1:

I am referring TRM  SPRUII0B :  May 2019–Revised May 2020

From the Bus architecture i understand as below :

11.6 CPU and CLA Arbitration

• Peripheral frame 1: ePWM, eCAP, eQEP, SDFM, CMPSS, DAC
• Peripheral frame 2: PMBus and SPI

Conflict Example: The CLA is accessing DAC-A while the DMA is simultaneously accessing DAC-B.
Conflict Example: The CPU is accessing an SPI FIFO while the DMA is simultaneously accessing a
PMBus register.
Non-conflict Example: The CPU is accessing a shared ePWM while the DMA is accessing an SPI.

The above text explains arbitration is required if we use CPU, along with its DMA , CLA. 

My question here is if i use ePWM in CPU1 and eCAP in CPU2 do we still need the arbitration logic. Do they have independant bus ?

thanks,

Nagesh