TMS320F28386D: CPU1TOCM MsgRam Allocation not align

I think that is expected because these are two different .out generate from different compilation. You need to use #pragma with exact same address if you want to allocate them at same address.

I am going to refer this to our compiler team to provide their expert comment on this.

Regards,

Vivek Singh

I would like to see more details about the sections in the GROUP.   The OFD utility ofd2000 is in the same directory as the compiler cl2000.  The same is true of armofd for the Arm compiler.  Please use those utilities to run commands similar to ...

% ofd2000 --verbose --obj_display=none,sections -o cpu1_ofd.txt cpu1.out
% armofd --verbose --obj_display=none,sections -o cm_ofd.txt cm.out

The output of these commands is in the text files cpu1_ofd.txt and cm_ofd.txt.  Please attach those files to your next post.

Thanks and regards,

-George

Hi George,

These are the attach files

/cfs-file/__key/communityserver-discussions-components-files/171/1200.cpu1_5F00_ofd.txt

/cfs-file/__key/communityserver-discussions-components-files/171/2287.cm_5F00_ofd.txt

Thank you

Thank you for the OFD output files.  

I think the section MIII_ReceiveErrorFiles is blocked.  In this case, that means it is aligned to a 64-word boundary.  However, I am not certain.  It turns out this cannot be verified by looking at OFD output or the linker map file.  I need to look at the assembly code output by the compiler.

I presume you know which source file creates the section MIII_ReceiveErrorFiles.  For that source file, please follow the directions in the article How to Submit a Compiler Test Case.

Thanks and regards,

-George

Hi George,

CCS Version: 9.3.0.00012 

CPU1 Comiler: v20.2.4

CM Compiler: v18.12.6

Here are the CPU and CM ppfiles:

/cfs-file/__key/communityserver-discussions-components-files/171/CPU1_5F00_pp.txt

/cfs-file/__key/communityserver-discussions-components-files/171/CM_5F00_pp.txt

"I think the section MIII_ReceiveErrorFiles is blocked." How can I set the block or unblock for the section?

In Addition,

Originally, there is no this problem, both CPU1 and CM are continuous between MIII_LnkRbuffFiles and MIII_ReceiveErrorFiles

I just added some variable in other front section(CPU1RefVariableCMFiles), and the problem happended.

Do you have other ideas?

Thank you.

Frederick LIN said:

"I think the section MIII_ReceiveErrorFiles is blocked."

It is, and this is the reason for the hole between sections in the GROUP.  When a variable (in this case, a structure) is blocked, that means it must either fit entirely within a page, or begin on a page.  A page is a block of memory 64-words long that begins on a 64-word boundary.  The section MIII_ReceiveErrorFiles is 8 words long.  In your specific case, when the linker started to allocate this section, less than 8 words remained in the current page.  So, a hole is created, and this section begins on the next page. 

Frederick LIN said:

How can I set the block or unblock for the section?

This solution presumes you build with the newer EABI, and not the older COFF ABI.  In that case, use the variable attribute noblocked.  In your specific case, it looks like ...

__attribute__((noblocked))
MIIIReceiveError MIIIReceiveError1;

This applies the attribute to the definition of the structure.  The noblocked attribute must also be applied to the declaration.  Declarations typically appear in header files.  In the preprocessed file you sent, I did not find a declaration for the structure MIIIReceiveError1. 

Please let me know if this suggestion resolves the problem.

Thanks and regards,

-George

Hi George,

It works, there is no hole after add "__attribute__((noblocked))".

But it very inconvenient.

1. Can we set "noblocked" in the project properties setting or .cmd file instead of adding  __attribute__ to every single declaration?

2. Can CPU and CM have same setting about the attribute?

3. Why CPU and CM have different rule, they are both EABI?

In addition, 

If I didn't add  "__attribute__((noblocked))", and just change the CPU1RefVariablesCM content. It seam no block in CPU1, what different? See below image and .pp file

/cfs-file/__key/communityserver-discussions-components-files/171/CPU1_5F00_pp_5F00_2.txt

Thank you

For some background on this situation, please search the C28x compiler manual for the sub-chapter titled Data Page (DP) Pointer Load Optimization.  

Frederick LIN said:

Can we set "noblocked" in the project properties setting or .cmd file instead of adding  __attribute__ to every single declaration?

Unfortunately, the only other solution is to define these structure variables in assembly code.

Frederick LIN said:

Can CPU and CM have same setting about the attribute?

Unfortunately, no.  They are two different compilers for different CPU cores.  The ARM compiler (for the CM) does not have the concept of pages or a DP register.

Frederick LIN said:

If I didn't add  "__attribute__((noblocked))", and just change the CPU1RefVariablesCM content. It seam no block in CPU1, what different?

In this case, the blocking is used, but it has no effect on the section MIII_ReceivedErrorFiles.  That is because it starts on address that is more than 8 words away from the start of the next data page.  In your previous build, the earlier sections are longer.  This pushes the section MIII_ReceivedErrorFiles out to a point where the blocking is forced to create the hole.

Thanks and regards,

-George

Hi George,

Why the section Host_CPU1ServoRspFiles in my newest post not start at 0x39480?

The page of 0x39476 remain 0x0A, but the size of Host_CPU1ServoRspFiles is 0xe0, why it is not blocked?

HI George

How about a structure array?

We tried to modify to below declaration, they are not blocked.

MIIIReceiveError MIIIReceiveError1[2];

or

MIIIReceiveError MIIIReceiveError1[1];

Hi George,

Sorry for asking one more question.

If we set a struct to "noblocked" in CPU1, how is the time cost affect difference from "blocked" in accessing the struct variable?

Thank you.

Frederick,

George is going to be out for a few days.  I will see if I can find someone else to comment on the last question.

Regards,

John

When data is blocked, the compiler can then apply optimizations to eliminate redundant loads of DP reg.  For unblocked data, each DP load instruction must be kept. There may be more DP load instructions for unblocked than for blocked data.

Thanks
greg