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TMS320F28379D: I cannot reprogram flash after first programming

Part Number: TMS320F28379D
Other Parts Discussed in Thread: UNIFLASH

Hi,

I had a chip TMS320F28379D with blank flash. I succesfully programmed it with my program:

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int main(void)
{
EALLOW;
Flash0EccRegs.ECC_ENABLE.bit.ENABLE = 0;
EDIS;
EALLOW;
*(Uint32 *)0xD00 = 0x0B5A;
EDIS;
InitSysPll(XTAL_OSC,IMULT_40,FMULT_0,PLLCLK_BY_2);
[...]
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

As you see InitSysPll has been called with XTAL_OSC but this clock signal is not provided.

I cannot erase nor program flash using CCS and UniFlash. I even cannot check if the chip is blank.

Uniflash signals following errors:

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[2.11.2021, 08:05:21] [INFO] C28xx_CPU1: Executing Blank Check...
[2.11.2021, 08:05:44] [ERROR] C28xx_CPU1: Error occurred during flash operation: Timed out waiting for target to halt while executing wr_pll.alg
[2.11.2021, 08:05:44] [ERROR] C28xx_CPU1: Error writing the PLL values (Flash algorithm timed out). Operation cancelled.
[2.11.2021, 08:05:44] [ERROR] C28xx_CPU1: Perform a debugger reset and execute the Boot-ROM code (click on the RESUME button in CCS debug window) before erasing/loading the Flash. If that does not help to perform a successful Flash erase/load, check the Reset cause (RESC) register, NMI shadow flag (NMISHDFLG) register and the Boot-ROM status register for further debug.
[2.11.2021, 08:05:44] [ERROR] C28xx_CPU1: Flash Programmer: Error initializing device.
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

How to recover the chip?

Kind regards,

Piotr Romaniuk

PS
I can connect via JTAG to the chip CCS without programming flash and then check registers, setup breakpoints and make step execution.
In debuger I tried to change oscillator source (to INT2_OSC). I setup breakpoint before InitSysPll and then modified register that holds this argument. Unfortunatelly PLL was never locked and program stuck at:

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ClkCfgRegs.SYSPLLMULT.all = ((fmult << 8U) | imult);
//
// Wait for the SYSPLL lock counter
//
while(ClkCfgRegs.SYSPLLSTS.bit.LOCKS != 1) <<<<< stuck here
{
//
// Uncomment to service the watchdog
//
// ServiceDog();
}
}
}
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

  • Hello, 

    I will get back to you in a couple of days after consulting with a teammate. 

    Thanks, 

    Anu

  • Piotr,

    Can you try below:

    1. Set the boot mode to wait-boot.

    2. Power up the device.

    3. Connect CCS

    4. Do a debugger reset in CCS

    5. Click on resume button in CCS and wait for a few seconds

    6. Halt the core if it is not already halted

    7. Open the CCS flash plugin GUI (CCS debug view -> Tools -> On-Chip flash)

    8. Click on the erase button

    Notes:

    1. Please use latest CCSv11.

    2. Do not change any of the default settings in the CCS on-chip flash plugin GUI (Clock source should be INTOSC in the GUI when you try the above steps).

    Let us know the result.

    Thanks and regards,
    Vamsi

  • Vamsi,

    How can I set boot mode to wait-boot?

    Kind regards,
    Piotr Romaniuk

  • Piotr, 

    Please configure boot mode to wait boot by setting up boot pins as described in the table below: 

    Thanks

    Anu

  • Anu,

    I cannot control pins gpio72 and 84, they are pulled up to Vdd and connected to FGPA on my board. 
    I also observed that when I attach debug session the CPU resets.

    Kind regards,
    Piotr Romaniuk

  • Piotr, 

    Do you have alternate boot mode select pins configured on your device if GPIO 72 and 84 are being used? You can use those to set the boot mode. 

    I also observed that when I attach debug session the CPU resets.

    Is the CPU already running when the debug session starts? Are you looking for guidance on how to start a debug session on a running target without causing a reset?

    Thanks, 

    Anu

  • Anu,

    In my board gpio 72 and 84 are configured as boot pins. They both are pulled up to Vdd so the boot mode is selected to flash boot. They are also connected to unprogrammed FPGA so I cannot manipulate with wires/short circuits to ground (I am just afraid to broke FPGA). Alternate boot pins are also connected to the FPGA. I cannot program now FPGA.

    I am trying to recover CPU only by software means like JTAG debugger control (stepping execution, breakpoint and register modification). I hope it is possible. If yes, I would like to direct CPU to boot wait by this way and then dettach debugger leaving CPU in boot wait. The obstacle is that CPU is reset when I connect debugger again (from UniFlash).

    Kind regards,
    Piotr Romaniuk

  • Piotr, 

    I will reach out to JTAG experts to help you with the debugger questions you are having. 

    Thanks, 

    Anu

  • Piotr,

    Can you please try the sequence (using CCS) that I mentioned in my first reply of this post?  I understand that the boot mode pins are configured for flash.  You can skip #1 in the sequence that I outlined.  Let us know how it goes.  

    Regarding the reset, it might be from the gel file.  Please comment out the GEL_Reset() in OnTargetConnect() and in OnPreFileLoaded() as needed.

    Please note:  We are out of office as of now.  Anu will be back to office mid next week.  If you have further questions, please expect a reply mid next week.

    Thanks and regards,
    Vamsi