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Dear Champs,
In some applications with variable PWM frequency (where control ISR frequency is fixed), it is possible that the ISR freq >2 * PWM frequency, which mean the PWM register might be changed twice within a PWM cycle.
Under this circumstances, we must make sure the OSHTLD(which is set by the 1st control ISR)is cleared when PWM shadow register is being updated. Otherwise, there might be a mismatch if a load event happens while the shadow register is updated by the 2nd control ISR.
Is there any method to clear the OSHTLD or to forbid shadow register update temporarily?
Regards,
Brian
