Other Parts Discussed in Thread: TMDSCNCD28388D, C2000WARE
Hello,
I am working on a TMS320F28388D CPU located on the TMDSCNCD28388D evaluation board. The processor contains 3 CPU cores: CPU1 (C2000) / CPU2 (C2000) / CM (Connectivity Manager - ARM Cortex-M4).
It seems that the CPU1 core has no direct access to the flash memory of the CM core. I assume that I have to boot the CM core first via CPU1 and afterwards exchange data between the cores over the IPC interface, which the CM can then finally store on his flash. Therefore, I believe that I have to first boot the CM via a boot-mode called ‘Copy from IPC Message RAM and boot to RAM’ (see reference manual spruii0c.pdf table ‘5-1. Boot System Overview’).
My plan would now be, that I am writing a CPU1 application (e.g. based on the blinking LED example), which boots the CM in this ‘Copy from IPC Message RAM and boot to RAM’ boot mode and I would like to add the CM boot image as an array to the CPU1 project. I would like to take also the blinking LED example for the CM core in build configuration CM_RAM (the whole application resides on the RAM memory) and check that the CM core is running that blinking LED application.
I have the following questions
1) Can you please confirm that CPU1 has no ability to directly access the Flash of the CM?
2) Is my approach correct, that I first have to boot the CM via the ‘Copy from IPC Message RAM and boot to RAM’ boot mode? Afterwards that CM application can continue to communicate with the CPU1 core over the IPC message RAM and access the CM-flash.
3) Is there a TI example project available, which shows how the CPU1 boots the CM over IPC, referred to as ‘Copy from IPC Message RAM and boot to RAM’ inside table 5-1 of the file spruii0c.pdf?
4) Is an application note for ‘Copy from IPC Message RAM and boot to RAM’ available, since the information inside chapter 5.7.7.1.6 of the reference manual spruii0c.pdf is not detailed enough? In this chapter it looks like I can write only one time a CM boot-loader image of max. 2[kword] to the IPC message RAM, which is copied by the CM to his RAM and executed. This would be of course a limitation for the size of the CM image.
5) I also see no information in which format the boot-image has to be, so how do I need to set up the ‘Arm Hex Utility’ tool inside the CM project for this boot mode?
6) In case that there is no further documentation or example project: Is the CM ROM boot-loader source code available, in order to learn from that code how the ‘Copy from IPC Message RAM and boot to RAM’ boot mode is working from the CM view? If so, where can I find it?
Thanks,
Inno