TMS320F280039C: Shift operations not match divisions in CLA task

HI Wayne,

Would it be possible to provide a test case and let me know the compiler version and optimization level?

http://software-dl.ti.com/ccs/esd/documents/sdto_cgt_How-to-Submit-a-Compiler-Test-Case.html

Thanks,

Ashwini

Dear Ashwini,

I already could make a simple project to reproduce the user's issue.

You can just use below codes to reproduce it.

I will also send you the project for reference.

#pragma INTERRUPT(Cla1Task8_background, "BACKGROUND")
interrupt void Cla1Task8_background()
{

__mdebugstop();

volatile short A = 2044;
volatile short B = -800;
volatile short C = 0;

if(B > 792)
B = 792;
else if ((B + 792) < 0 )
B = 0-792;

A = B >> 5;
C = B / 32;

.........

You can see A is 2023, which was not expected.

This issue happens as long as you use negative integer for B and declare B as short or int16.

Note that we also found that if A, B, C were declared as int rather than short/int16, then there was no such issue.

It seems there is something wrong with sign bit handling.

Would you please help check if there is any limitation here or anything wrong with the compiler?

The compiler we used here is:

CCS 11.0

C2000 compiler V21.6.0.LTS

Optimization

-v28 -ml -mt --cla_support=cla2 --float_support=fpu32 --idiv_support=idiv0 --tmu_support=tmu1 --vcu_support=vcrc -O1 --opt_for_speed=3 --fp_mode=relaxed 

......

--abi=eabi --cla_background_task=on --cla_signed_compare_workaround=on

Wayne Huang

Hi Wayne,

Thanks a lot for the test case. The compiler team is investigating this. One observation is that if the volatile keyword is removed, the compute is correct.

Thanks,

Ashwini