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TMS320F28377D: PWM INITIALIZATION

VISHAL SAPAARA
Prodigy 60 points
Part Number: TMS320F28377D

Dear all,

 I have configured three level inverter PWM in my system and I am getting some error initially and when there is no COMPARE event at that time 1B AND 2B are HIGH unintentionally because they are complementally .

I have attached the image for PWM given to one leg for your ref.

ch-1 , ch-2 , ch-3 ,ch-4. are the scope Channel number and scope image with T3 AND T4 ARE HIGH when T1 AND T2 are low. this occurs only during initialization and then its all ok. 

i have attached code and of initialization and EnablePWM function  .this enablepwm is only call once during start-up at every staring event only.

please suggest me how can i make T3 And T4 both Low . 

 

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void InitPwm1(void)
{
EALLOW;
EPwm1Regs.TBPRD = EPWM1_TIMER_TBPRD;
EPwm1Regs.TBCTR = 0x0000;
EPwm1Regs.TBCTL.bit.PHSDIR = TB_UP;// Clear counter
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up and down
#ifdef SLAVE_MODE
EPwm1Regs.TBCTL.bit.PHSEN = TB_ENABLE;
#else
EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;
#endif
EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

  • 0
    TI__Mastermind 24830 points

    Hi Vishal,

    Because you are using the dead-band submodule to create complementary pairs you have two options to make all output low upon initialization.

    1) Keep the pins as GPIOs instead of EPWM pins until initialization is over (after TBCLKSYNC=1)

    2) Apply a software force (TZFRC register) within the trip zone submodule to make the outputs low. (clear the software force after TBCLKSYNC=1)

    Best Regards,

    Marlyn

  • 0 in reply to Marlyn Rosales Castaneda20
    Prodigy 60 points

    Hi Marlyn Rosales ,

    This PIN become high when i call EnablePwm() function after completion of  PWM initialization.

    when it is into  EnablePwm() at that time when i call below instruction at that create the T3 and T4 to high. 

    EPWM1 & EPWM2 is for R-phase and EPWM3 & EPWM7 IS FOR Y PHASE and so on.

    EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
    EPwm2Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
    EPwm3Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
    EPwm7Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
    EPwm8Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
    EPwm9Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;

    please suggest how can i make this T3 and T4 low. 

    PWM initialization happens in main() during starting of program ,

    1. first this function is call

    void testing_gpio_config(void)
    {
    unsigned int i;
    EALLOW;

    //44-45, 59-66 DI
    //12 to 17 DO
    //31 to 41, 48 to 58 DO
    //3 t 7, 80 to 83, 86 to 92 DO
    /*-------------------------------------------*/
    for(i=0;i<=5;i++) //pwm
    {
    GPIO_SetupPinMux(i,0,1);
    GPIO_SetupPinOptions(i, GPIO_OUTPUT, GPIO_PUSHPULL);
    }

    for(i=12;i<=15;i++) //pwm
    {
    GPIO_SetupPinMux(i,0,1);
    GPIO_SetupPinOptions(i, GPIO_OUTPUT, GPIO_PUSHPULL);
    }
    for(i=16;i<=17;i++) //pwm
    {
    GPIO_SetupPinMux(i,0,5);
    GPIO_SetupPinOptions(i, GPIO_OUTPUT, GPIO_PUSHPULL);
    }

    }

    2. then PWM initialization happens.

    EALLOW;
    CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 0;
    // EDIS;
    InitPwm1();
    InitPwm2();
    InitPwm3();
    #ifndef SLAVE_MODE
    InitPwm4();
    #endif
    InitPwm7();
    InitPwm8();
    InitPwm9();
    InitPwm12();
    EALLOW;
    CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1;
    // EDIS;

    after completion of this event  EnablePwm()  function is called and during EPwmxRegs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;  the PWM become high for T3 and T4.

    here the pin definition happen before PWM initialization in testing_gpio_config() before EPWM initialization.

    please suggest how to deal with this and make T3 and T4 to low. 

  • 0 in reply to VISHAL SAPAARA
    TI__Mastermind 24830 points

    Hi Vishal,

    By nature, this is happening because you are configuring the OUT_MODE bit. In your initial diagram you mention that you want the signals to be complementary. Can you please provide a diagram or scope capture of how you want your outputs during initialization, after calling EnablePwm(), and later in your application?

    VISHAL SAPAARA said:
    please suggest how to deal with this and make T3 and T4 to low. 

    As mentioned before, since you are using the dead-band submodule, the only way to make the outputs low is to apply a software force (TZFRC register) within the trip zone submodule to make all outputs low. When you are ready for the signals to be complementary you can clear the software force.

    Best Regards,

    Marlyn