TMS320F280039C: GPIO_togglePin speed?

Hi Bernhard,

Thanks for your question. I will connect you with a compiler expert to assist you.

Regards,
Vince

Hi Bernhard,

After discussing with the ISA experts, they have provided the following information:

While it is true that a stand-alone “OR” instruction is indeed a single-cycle instruction, the actual cycle count will also depend on pipeline protection cycles which could occur due to the instructions in the pipeline before the current instruction.

In this specific case, the “OR @7, ..” instruction will issue a memory read to the GPIO register space and this could result in regular or block protection cycles.

However, in the other case of two assembly instructions, the first instruction reads the local stack memory and the second instruction does only a write to the GPIO data reg and hence there will not be any block protection cycles. As explained above, the CPU and block protection pipeline stalls can introduce more cycles than just the basic instruction cycle count.

The TOGGLE and similarly with SET, CLEAR registers in the GPIO Mux is a write only register (write 1 to toggle the pin), reading the register always returns a zero.

Therefore if you want to manipulate any GPIO output (TOGGLE, SET high, CLEAR low), all you need to do is write a "1" to the respective bit of the registers.

How the bits get manipulated now depends on how you write your C code.

If you write the code as follows:

                GpioDataRegs.GPATOGGLE.bit.GPIO20 = 1;

The compiler generates a Read-Modify-Write Operation "OR" as follows:

                OR           @0x7, #0x0010

This operations reads the TOGGLE register (which returns a zero), then OR's the value with #0x0010 and then writes it back to the TOGGLE register, hence forcing the output that was written a "1" to toggle.

The read operation is redundant. All you need to do is perform a write of a 16-bit value to the register. For example:

              gpioDataReg[GPIO_GPxTOGGLE_INDEX] = 0x0010;

This would generate the following assembly instruction:

              MOV  @0x7, #0x0010

Now you are only performing a write operation and no read operation is necessary. This is a lot faster as reads take 3 cycles and writes take 1 cycle (assuming no other operations on the registers cause a pipeline conflict).

Regards,

Vince

Hi Vince,

many thanks for your help and support on this issue. Now it's clear, what causes the difference. 

BR

Bernhard