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TMS320F28379S: ePWM: Can Triggers T1 and T2 be blanked if connected to Digital Compare submodule?

Part Number: TMS320F28379S
Other Parts Discussed in Thread: C2000WARE

Team,
Can you please help with the below question?

For our project we would like to support variable frequency mode where rising and falling edge for PWM signal are determined based on two external events.

My idea was shown in Figure which I attached, where triggers T1 and T2 for Action qualifier are used:



What I don´t know and what is not clear is if we select for example DCAEVT1 to be source for T1
-then can we use blanking period?
It is not clear if blanking is used just for the signals which comes to the trip-zone. It is not clear from where DCAEVT1 comes.
-Does it come before filtering module or it can go also through the filtering module?
Here blanking would be very important for us, so that we can limit the minimum Off-time.
If we cannot use blanking with T1 and T2 than I suppose the only option is to use Cycle-By-Cycle Trip event.
-Blanking should be included while using CBC. correct?
-Can Triggers T1 and T2 be blanked if connected to Digital Compare submodule?
Or is blanking only possible is trip is used?
-Any existing code examples you can refer to?

Thanks in advance,

A.

  • Hi AnBer,

    When you refer to blanking period, do you mean having blanking events to filter out DCA/B events?

    Here is a the block diagram from the TRM that shows what Trip inputs come into the Digital Compare Submodule.

    DCAEVT1 comes before filtering but there is also a DCEVTFILT signal.

    Yes, blanking should be included while using CBC. Here is an app note as reference regarding Digital Compare and CBC.

    Let me know if this helps answer your questions.

    https://www.ti.com/lit/an/sprad12/sprad12.pdf?ts=1673561014156&ref_url=https%253A%252F%252Fwww.google.com%252F

    Examples can be found in:

    C:\ti\c2000\C2000Ware_4_02_00_00\driverlib\f2837xd\examples\cpu1\epwm\epwm_ex4_digital_compare.c

    C:\ti\c2000\C2000Ware_4_02_00_00\driverlib\f2837xd\examples\cpu1\epwm\epwm_ex5_digital_compare_event_filter

  • Hi Ryan,

    Thank you for your anwer. AnBer asked for me because I had some troubles posting the question. I will make some additional questions to clarify my understanding. Inside Action Qualifier submodule you have possibility to generate rising and falling edge based on T1 and T2 events. T1 and T2 events can be connected to the DCAEVT1 for example. Question: Is DCAEVT1 before filtering block (I suppose it is)? Can we push DCAEVT1 through filter submodule inside Digital compare submodule and then use it as a source for T1 and T2 events, or T1 and T2 can be only used directly without filtering? This is the main issue with my understanding.

    I did some testing and I think it cannot be used as filtered signal in such way but I am not sure. Could you confim above?

    I tested also CBC module and triggering the rising edge with and without filter is working, but I need to do more testing.

  • Hi Haris,

    AQCTL screenshot:

    I had to update this answer: 

    You are correct, for this device it is using the unfiltered source of DCAEVT1.

    However, if you had a F28004x device, there will be the DCEVT1FILT signal that can be used.

  • Thank you very much. Now everything is clear for me :)