tms320F28035 CAN locking the program

I'm using the CAN module of TMS320F28035, in my application I need to change the clock frequency to decrease

the power consumption of the system under stand-by conditions and i need to keep CAN working with reduced clock frequency

in order to reach that aim, I need to configure the CANBTC to work properly in both conditions, clock 60MHZ and clock 20MHZ.

sometimes when I perform tha operation the program is locked and i need to turn off the power supply to resume the operation.

How should I handle the situation when the program stays locked in one of the do while loops?

 void InitECana(void) // Initialize eCAN-A module

{

/* Create a shadow register structure for the CAN control registers. This is

 needed, since only 32-bit access is allowed to these registers. 16-bit access

 to these registers could potentially corrupt the register contents or return

 false data. This is especially true while writing to/reading from a bit

 (or group of bits) among bits 16 - 31 */

struct ECAN_REGS ECanaShadow;

EALLOW; // EALLOW enables access to protected bits

/* Configure eCAN RX and TX pins for CAN operation using eCAN regs*/

    ECanaShadow.CANTIOC.all = ECanaRegs.CANTIOC.all;

    ECanaShadow.CANTIOC.bit.TXFUNC = 1;

    ECanaRegs.CANTIOC.all = ECanaShadow.CANTIOC.all;

    ECanaShadow.CANRIOC.all = ECanaRegs.CANRIOC.all;

    ECanaShadow.CANRIOC.bit.RXFUNC = 1;

    ECanaRegs.CANRIOC.all = ECanaShadow.CANRIOC.all;

/* Configure eCAN for HECC mode - (reqd to access mailboxes 16 thru 31) */

// HECC mode also enables time-stamping feature

ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;

ECanaShadow.CANMC.bit.SCB = 1;

ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;

/* Initialize all bits of 'Message Control Register' to zero */

// Some bits of MSGCTRL register come up in an unknown state. For proper operation,

// all bits (including reserved bits) of MSGCTRL must be initialized to zero

    ECanaMboxes.MBOX0.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX1.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX2.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX3.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX4.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX5.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX6.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX7.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX8.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX9.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX10.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX11.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX12.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX13.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX14.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX15.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX16.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX17.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX18.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX19.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX20.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX21.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX22.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX23.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX24.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX25.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX26.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX27.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX28.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX29.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX30.MSGCTRL.all = 0x00000000;

    ECanaMboxes.MBOX31.MSGCTRL.all = 0x00000000;

// TAn, RMPn, GIFn bits are all zero upon reset and are cleared again

// as a matter of precaution.

ECanaRegs.CANTA.all = 0xFFFFFFFF; /* Clear all TAn bits */

ECanaRegs.CANRMP.all = 0xFFFFFFFF; /* Clear all RMPn bits */

ECanaRegs.CANGIF0.all = 0xFFFFFFFF; /* Clear all interrupt flag bits */

ECanaRegs.CANGIF1.all = 0xFFFFFFFF;

/* Configure bit timing parameters for eCANA*/

    ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;

    ECanaShadow.CANMC.bit.CCR = 1 ;            // Set CCR = 1

    ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;

    // Wait until the CPU has been granted permission to change the configuration registers

    do

    {

     ECanaShadow.CANES.all = ECanaRegs.CANES.all;

    } while(ECanaShadow.CANES.bit.CCE != 1 );   // Wait for CCE bit to be set..

    ECanaShadow.CANBTC.all = 0;

       if (FlagLowFrequencyMode == 0)

      {

         ECanaShadow.CANBTC.bit.BRPREG = 35;//19; //teste 39;

        ECanaShadow.CANBTC.bit.TSEG2REG = 1;// 2;//teste 2;

        ECanaShadow.CANBTC.bit.TSEG1REG = 6;//10;//teste10;

        ECanaShadow.CANBTC.bit.SAM = 1;

         ECanaShadow.CANBTC.bit.SJWREG = 1;

        }

      else

      {

         ECanaShadow.CANBTC.bit.BRPREG = 5;//9;//2; //teste 39;

        ECanaShadow.CANBTC.bit.TSEG2REG = 1;// 8;//teste 2;

         ECanaShadow.CANBTC.bit.TSEG1REG = 6;//16;//teste10;

       ECanaShadow.CANBTC.bit.SAM = 1;

         ECanaShadow.CANBTC.bit.SJWREG = 1;

     }

    ECanaShadow.CANBTC.bit.SAM = 1;

    ECanaRegs.CANBTC.all = ECanaShadow.CANBTC.all;

    ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;

   ECanaShadow.CANMC.bit.CCR = 0 ;            // Set CCR = 0

    ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;

    // Wait until the CPU no longer has permission to change the configuration registers

    do

    {

      ECanaShadow.CANES.all = ECanaRegs.CANES.all;

    } while(ECanaShadow.CANES.bit.CCE != 0 ); // Wait for CCE bit to be  cleared..

/* Disable all Mailboxes  */

  ECanaRegs.CANME.all = 0; // Required before writing the MSGIDs

    EDIS;

}