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Hi @ all,
I want to use the eCap as an interrupt source in APWM mode. I want to generate an periodical interrupt, if the timebase counter is equal the period register (CTR==PRD).
With the following configuration, I get !two! interrupts:
Configuration of the periphals:
ECap1Regs.ECEINT.all = 0x0000; // Disable all capture interrupts
ECap1Regs.ECCLR.all = 0xFF; // Clear all CAP interrupt flags
ECap1Regs.CTRPHS=0; // Set phase to zero
ECap1Regs.ECCTL1.all = 0; // Disable ECCTL1
ECap1Regs.ECCTL2.all = 0; // Stop the counter and disable all
// Configure peripheral registers
ECap1Regs.ECCTL2.bit.SYNCI_EN = 0; // Disable sync in
ECap1Regs.ECCTL2.bit.SYNCO_SEL = 3; // Disable sync out
ECap1Regs.ECCTL2.bit.CAP_APWM=1; // Set APWM Mode
ECap1Regs.ECEINT.bit.CTR_EQ_PRD=1; // Enable int @ CTR==PRD
ECap1Regs.CAP1=10000; // Load periode register
ECap1Regs.ECCTL2.bit.TSCTRSTOP=1; // Start the counter
In the ISR:
ECap1Regs.ECCLR.bit.INT = 1; // Clear the ECAP1 interrupt flag
ECap1Regs.ECCLR.all = 0xFF; // Clear all ECAP interrupt flags
The first interrupt occur when the counter is equal to the period register. The second interrupt occur 250 ns after the first (CTR==PRD) interrupt. And I don't know why the second interrupt occur!
I hope someone could say me what's wrong with this configuartion.
With best regards,
Chris
Here you can find the whole configuration (main):
#include "DSP28x_Project.h" void initPeriphals(void); interrupt void ecap1_isr(void); void main(void) { InitSysCtrl(); // Disable CPU interrupts DINT; // Initialize the PIE control registers to their default state. // The default state is all PIE interrupts disabled and flags // are cleared. // This function is found in the DSP2833x_PieCtrl.c file. InitPieCtrl(); // Disable CPU interrupts and clear all CPU interrupt flags: IER = 0x0000; IFR = 0x0000; // Initialize the PIE vector table with pointers to the shell Interrupt // Service Routines (ISR). // This will populate the entire table, even if the interrupt // is not used in this example. This is useful for debug purposes. // The shell ISR routines are found in DSP2833x_DefaultIsr.c. // This function is found in DSP2833x_PieVect.c. InitPieVectTable(); initPeriphals(); EALLOW; PieVectTable.ECAP1_INT = &ecap1_isr; EDIS; // Step 5. User specific code, enable interrupts: // Enable CPU INT4 which is connected to ECAP1 INT: IER |= M_INT4; PieCtrlRegs.PIEIER4.bit.INTx1 = 1; // // Enable global Interrupts and higher priority real-time debug events: EINT; // Enable Global interrupt INTM ERTM; // Enable Global realtime interrupt DBGM while(1) { } } void initPeriphals(void){ ECap1Regs.ECEINT.all = 0x0000; // Disable all capture interrupts ECap1Regs.ECCLR.all = 0xFF; // Clear all CAP interrupt flags ECap1Regs.CTRPHS=0; ECap1Regs.ECCTL1.all = 0; // Disable ECCTL1 ECap1Regs.ECCTL2.all = 0; // Stop the counter and disable all // Configure peripheral registers ECap1Regs.ECCTL2.bit.SYNCI_EN = 0; // Disable sync in ECap1Regs.ECCTL2.bit.SYNCO_SEL = 3; // Disable sync out ECap1Regs.ECCTL2.bit.CAP_APWM=1; // Set APWM Mode ECap1Regs.ECEINT.bit.CTR_EQ_PRD=1; // Enable int @ CTR==PRD ECap1Regs.CAP1=10000; // Load period register ECap1Regs.ECCTL2.bit.TSCTRSTOP=1; // Start the counter } interrupt void ecap1_isr(void) { // Clear the interrupt flag ECap1Regs.ECCLR.bit.INT = 1; // Clear the ECAP1 interrupt flag ECap1Regs.ECCLR.all = 0xFF; // Clear all ECAP interrupt flags // Acknowledge this interrupt to receive more interrupts from group 4 PieCtrlRegs.PIEACK.all = PIEACK_GROUP4; } //=========================================================================== // No more. //===========================================================================
Hi @ all,
I think I figured out the problem.
Just have a look at the ISR:
First I have to clear the eCap interrupt flag and after that I have to clear the "normal" interrupt flag.
And now the ISR looks like:
ECap1Regs.ECCLR.bit.CTR_EQ_PRD = 1;
ECap1Regs.ECCLR.bit.INT = 1;
A stupid mistake! ;)
Cheers
Chris