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TMDSCNCD28379D: Local shared RAMs blocks arbitration

Part Number: TMDSCNCD28379D

Hello,

Is there a conflict or arbitration required when accessing different Local Shared RAMs blocks at the same clock or conflict is only when trying to access the same LSxRAM block?
e.g., if CPU1 tries to access LS1RAM and CLA.CPU1 tries to access LS2RAM at the same time, is arbitration required (as with DMA and CPU accessing different GSxRAMs at the same time) ?

While this issue with regards to GSxRAMs is explicitly mentioned in the documentation, I couldn't find an answer to the LSxRAMs case.

Thanks,

Dvir

  • Hello Divir,

    You can refer to section 3.11.1.6 Access Arbitration within the device manual for the expansive detail on how arbitration works, where Figure 3-15 "Arbitration Scheme on Local Shared Memories" shows arbitration for LSxRAM. Let me know if you have questions on specifics on how this arbitration works.

    Best regards,

    Omer Amir

  • Hi Omer,

    Thank you for the prompt response.

    Yes, I have previously and also now reviewed these sections but my question was not about the arbitration process itself (when required). 

    My question was whether arbitration is required at all and implemented when two different LSxRAM memory blocks are trying to be accessed simultaneously or rather arbitration is not required in this case and the two LSxRAM memory blocks will indeed be accessed simultaneously.

    To make it more clear, could you kindly refer to the following example where 2 different LSxRAM memory blocks are attempted to be accessed simultaneously:

    If CPU1 tries to access LS1RAM and CLA.CPU1 tries to access LS2RAM simultaneously (at the same clock cycle), is there a conflict where arbitration is required or is there no conflict and access will happen at the same clock cycle?

    I know that if two different GSxRAM memory blocks are trying to be accessed at the same clock cycle (e.g., GS1 by CPU1 and GS2 by DMA1) then there is a conflict and arbitration must be executed to resolve this conflict, this is clearly mentioned in the documentation (section 5.6). However, I couldn't find anything written about the same case with two different LSxRAM memory blocks. 

    Best regards,

    Dvir

  • Hello Dvir,

    I will try to confirm with some other experts on this and get back to you early next week.

    Best regards,

    Omer Amir

  • Hi Omer,

    Thank you. Looking forward to your feedback.

    Best regards,

    Dvir

  • Dvir,

    Each memory block has its own bus, so for two different memory blocks, there will be no arbitration necessary.  The note in the TRM for the DMA chapter concerning GS0-GS2 is wrong and we need to get this fixed.  There is no stall when accessing different memory blocks by different bus owners.  If same memory block is accessed, then arbitration scheme will apply.

    Best,

    Matthew

  • Excellent, thanks Matthew