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TMS320F28377D-EP: Global Shared Ram access arbitration

Miroslav Prudky
Intellectual 260 points
Part Number: TMS320F28377D-EP

Is it possible to configure each of the GS0 to GS15 to be used exclusively by the specific CPU (CPU1 or CPU2) so that the other CPU can't delay access to the GSx memory ?

  • 0
    TI__Guru** 113695 points

    Hi,

    Be default all the GSx blocks are accessible from CPU1 and user can configure MSEL bit in GSxMSEL register to enable access from other CPU. But this is only for write and fetch access. Read access are allowed from all the masters and we do not have a mechanism to block that. Are you concern about incorrect access from other CPU due to some fault?

    Regards,

    Vivek Singh

  • 0 in reply to Vivek Singh
    Intellectual 260 points

    Vivek,

    thank you for the answer.

    I'm not concerned about incorrect access from other CPU, but I'm rather concerned about worst case execution time.

    Let's imagine the situation when CPU1 and CPU2 are running the code. CPU1 uses only GS1, CPU2 uses only GS2.

    What I'm interested in is whether CPU2 accesses to GS2 may delay CPU1 accesses to GS1 because of access arbitration ?

    Is there a common arbitration logic for all GSx blocks or each of the GSx blocks has it's own arbitration ? 

  • 0 in reply to Miroslav Prudky
    TI__Guru** 113695 points
    Hi,

    Each GSx RAM block has it's own arbitration logic so as long as both CPU are not accessing the same RAM block, there is no issue. CPU1 can access GS1 and CPU2 can access GS2 without any arbitration delay.

    Hope this helps.

    Regards,
    Vivek Singh
  • 0 in reply to Vivek Singh
    Intellectual 260 points

    Vivek,

    thank you for the answer, this is exactly the piece of information which I was missing and which was not clear from the manual.

    Regards,

    Miroslav Prudky