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Hi,
I'm trying to implement open loop PSFB drive signals with %50 duty and complementary with deadband.
OPTION#1 I did it before using ePWM1 and ePWM2. EPWM1 generates SYNCO, and ePWM2 takes this as SYNCIN and I load phase shift load value to ePWM2. I to generate phase shifted signals at ePWM2 according to ePWM1. I controlled my power stage using it. In this configuration, my power stage becomes TR-LEAD topology.
OPTION#2 However, now, I needed to switch my phase shift generation. I will change it to TR-LAG topology. I needed to generate same phase shifted signals at ePWM1 according to ePWM2. But I couldn't do that. I cannot change phase shift of ePWM1 using a slow loop at main.c. I did it for ePWM2 before as below software line.
This is my previous code (OPTION #1) snippest to generate TR-LEAD topology. How can I edit it to meet my need to generate OPTION #2?
void SYNC_init(void) { SysCtl_setSyncOutputConfig(SYSCTL_SYNC_OUT_SRC_EPWM1SYNCOUT); // // For EPWM1, the sync input is: SYSCTL_SYNC_IN_SRC_EXTSYNCIN1 // SysCtl_setSyncInputConfig(SYSCTL_SYNC_IN_EPWM4, SYSCTL_SYNC_IN_SRC_EPWM1SYNCOUT); SysCtl_setSyncInputConfig(SYSCTL_SYNC_IN_EPWM7, SYSCTL_SYNC_IN_SRC_EPWM1SYNCOUT); }
EPWM_setTimeBaseCounter(EPWM1_BASE, 0); EPWM_setPhaseShift(EPWM1_BASE, 0); EPWM_disablePhaseShiftLoad(EPWM1_BASE); EPWM_setSyncOutPulseMode(EPWM1_BASE, EPWM_SYNC_OUT_PULSE_ON_COUNTER_ZERO);
EPWM_setTimeBaseCounter(EPWM2_BASE, 0U); EPWM_enablePhaseShiftLoad(EPWM2_BASE); EPWM_setSyncOutPulseMode(EPWM2_BASE, EPWM_SYNC_OUT_PULSE_ON_EPWMxSYNCIN); EPWM_setPhaseShift(EPWM2_BASE, 2); // Value*TBCLKs Phase-Shift is Set EPWM_setCountModeAfterSync(EPWM2_BASE, EPWM_COUNT_MODE_UP_AFTER_SYNC);
I update phase shift using below lines at slow loop at main.c
HRPWM_setPhaseShift(EPWM2_BASE,DummyShift1);
Hi Gokhan,
To clarify, are you trying to generate a sync event from EPWM2 that will feed into EPWM1 SYNCIN?
This is not a direct option in the EPWM module for F28004x, however you can use the CLB and XBARs to achieve this. If you use EPWM2 CTR=ZERO event as the input to your CLB and send it out to the output of your CLB, you can send this output to a GPIO via the Output XBAR. Then you can use INPUTXBAR5 to select this GPIO which connects to EXTSYNCIN1, which is the sync in source for EPWM1.
Let me know if this will solve your problem or need help with this configuration.
Thank you,
Luke
Note that there may be some propagation delay introduced by the XBARs since the sync source does not come directly from EPWM2, so I would suggest testing this configuration with a phase shift of 0 for EPWM1 and determine the phase shift between EPWM1 and EPWM2 that is caused by the propagation delay.
Hi Luke,
To clarify, are you trying to generate a sync event from EPWM2 that will feed into EPWM1 SYNCIN?
Yes, I'm trying to do this. Actually method can be changed or diversifying. However, I'm not familiar with CLB. It takes time to me achieve it. If it is just the only one option, I will learn it later on.
It was easy to generate phase shifted ePWM2 signals according to ePWM1.However, I don't know how I cannot achieve it when switch the configuration. Could you please explain root of cause?
Can I achieve it easier using F28003x instead of F28004x?
Thank you.
Hi Gokhan,
Here is the synchronization scheme for F28004x EPWM:
As you can see, the SYNCIN sources for EPWM1 and EPWM2 are fixed(EXTSYNCIN1 is the source for EPWM1 while EPWM1 SYNCOUT is the source for EPWM2). Because of this, you would need to use the custom configuration I described above to synchronize EPWM1 to EPWM2.
On F28003x however, all EPWM modules have access to eachother's SYNCOUT signals to use as a source for SYNCIN:
Are you familiar with the SysConfig tool? This will make it much easier to configure the CLB and XBARs, as well as your EPWM initialization if you wish.
Hi,
Thank you I can review Sysconfig tool.
As you can see my code, I didn't configure EXTSYNCIN1 or etc., so how does SYNC signal generated in my code? How does ePWM1 generates SYNCOUT pulse and when? Does software triggers SYNCOUT signal for ePWM2? Could you please explain? Did I get wrong timing on PWM channels for ePWM1 and ePWM2?
Hi Gokhan,
You can configure what events cause each EPWM to generate a SYNCOUT pulse via the EPWM_setSyncOutPulseMode function. You can select a software trigger, counter = 0 event, counter = compare event, etc. This applies for all EPWM instances.
From my understanding, there was no issue when you configured EPWM2 to be synced by EPWM1 correct? In that case there are no issues with your code.
If you want to achieve the opposite, you will need some custom logic like I described above to generate a sync event on EXTSYNCIN1 that is caused by an event from EPWM2.
Are you trying to generate this sync event on every period, or only when enabled by software? If you are only doing it when enabled by software, you could send a software input to the CLB that enables the sync event generated by the EPWM2 event.
Again, I would HIGHLY recommend playing around with the SysConfig tool to achieve this configuration. It is much easier to explore the SysConfig GUI to configure the necessary registers then it is by looking at driverlib or the registers directly. This is especially true for the CLB and XBARs.
Let me know if you need any help configuring this in SysConfig.