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Hi, C2000 experts
I am using TMS320F280049C DSP to implement my digital power algorithm.
and now, I want to be able to configure the ePWM module to achieve the desired PWM waveform in the following figure.
(Interval t1-t2 is a complete switching cycle, and during one switching cycle, the ePWM module is expected to operate twice, like the figure above, the ePWM set Hi level time and dead time parameters are different)
I hope that TI's experts could provide an effective ePWM module configuration solution. Thanks very much.
Best regards.
Hi Suiyang,
My apologies, I forgot to post my reply to your thread.
When using up-count mode, it is not possible to have two pulses within one EPWM period on F28004x, however we are supporting this feature on future C2000 devices.
If you are using F28004x, you could achieve a similar waveform using a combination of up-down count mode in the EPWM (TBCLK increments from 0 to PRD and decrements back from PRD to 0 within one cycle) and the dead-band module. If you EPWM frequency is slow enough, you could generate interrupts on the TBCTR=0 and TBCTR=PRD events to modify your CMPA, CMPB, rising edge delay, and falling edge delay on each EPWM output. We have examples in C2000Ware demonstrating use of the dead-band module.
On future C2000 devices, there will be the capability to have more than two CMPx values so that you can generate multiple pulses at different duty cycles within a single EPWM period, without needing to use the dead-band module or up-down count mode.
Let me know what further assistance you need to achieve this configuration.
Thank you,
Luke
Hi Luke,
Thank you very much for your generous advice, I will try to implement your strategy. In my project, the switching frequency(t1-t2) may reach several hundred kHz, do you think the cpu bandwidth is enough for this configuration, considering the Loop calculation(10kHz for voltage loop, and 50kHz/100kHz for current loop). or i can use cla task to change CMPA, etc. value?
In my current strategy, the ePWM configuration is shown in the figure below, using two ePWM module to achieve two pulses in one ePWM PRD. In this configuration, the two pluses(with different set 1 time and period time) can generate, but the DB times (Fall/Raise DB and Fall/Raise DB2) is still same. do you think it is possible to achieve two different DB time with this configuration? and in the future, on new c2000 device with more CMPx, could the DB times change in one TBPRD value interval?
Addition, do you think the CLB module of this c2000 device could achieve the required features?(I don't have any experience with CLB module, and just know it is a powerful tool to achieve some fpga like functions)
Anyway, thank you again for your advice.
Best regards,
Suiyang.
Hi Suiyang,
The CLB module may provide a simpler solution to achieve this rather than varying your deadband values, I did not think of that.
Within the CLB modules there are counters with match values (similar to CMPA and CMPB in EPWM). Using events from the EPWM to control when the CLB counters are reset, and when their match values are updated, you could feed a simple EPWM output into the CLB, chop out portions of the duty cycle using CLB counter events, and feed the final EPWM output out of the CLB and override the EPWM output that goes out to the device pin.
We have CLB examples in C2000Ware to help get started, as well as a CLB user's guide. I have provided a link to the user's guide here:
There are a few submodules in the CLB, but for your configuration you will most likely need the counters, HLC(to updated the counter match values), and the OUTLUT modules to control the CLB outputs.
Let me know if you need any further assistance, I will loop in one of our CLB experts in case you have any further questions.
Thank you,
Luke
Hi Luke,
Thanks for your advice, I will try to learn the CLB module.
I wish you a happy day.
Best regards,
Suiyang.
Thanks Suiyang, I will close this thread for now. Let me know if you run into any issues.