This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F280041C: How to achieve a delayed shutdown after a over current protection?

Part Number: TMS320F280041C

Hi Expert,

     My product is a DC-DC converter, due to the high temperature, resulting in inductance saturation phenomenon, eventually leading to overcurrent protection, but if the MOS is turned off at this time, it will cause the MOS

turn-off stress beyond the threshold and damage. I would like to ask the experts how to achieve a delayed shutdown after the trigger protection, in other words, when the inductor current is zero, then turn off the MOS driver to

achieve a soft shutdown, and then ensure that the MOS tube will not be damaged.


     Finally, I also want to ask the difference between turning off MOS by TZ register and turning off MOS by AQ register, for example:

      EPwm4Regs.TZFRC.bit.OST =1;

      And EPwm48Regs AQCSFRC. Bit. CSFA = AQFRC_LOW;

  • Hi Feng,

    When you say you want to achieve a soft-shutdown, do you mean you want to gradually reduce the duty cycle of your EPWM output until it reaches zero? If so, the only way to do this is through software, AKA by writing a CMPA or CMPB value each cycle and decreasing the value each time.

    The difference between the TZ OST force and the action qualifier force is that the TZFRC is permanent, unless cleared via the TZCLR register. The action qualifer force will immediately change the state of your output, however the output will change again when the next action qualifer event occurs. The trip zone module completely overrides the output so that no other EPWM sub-module such as action qualifer can take control of the output until the trip is cleared.

  • Hi Jones,
    Thanks for your feedback ,and what I mean is that I want to turn off the EPWM output immediately at the beginning of the next cycle, because of the overcurrent fault that has occurred, such as the overcurrent fault in this cycle, which triggered the TZ interrupt, but I need to turn off the PWM output immediately at the beginning of the next cycle, because the current of the resonant inductor is just zero current at this time. At this time, the MOS stress is minimum.
    The second question is whether the TZ and AQ registers execute the following statements to turn off PWM immediately, or whether they can be configured to execute at the start of the next cycle.

  • Hi Feng,

    The action qualifier module can be used to cause the PWM output to be cleared in one of the following two ways:

    1) If your PWM output is being cleared on 0 and set on CMPA or CMPB, you can write a value of 0 to the CMPA/CMPB register. As long as you are shadow loading your CMPA/CMPB registers on TBCTR=0, this will cause the output to be cleared at the beginning of the next cycle, and stay cleared until you modify your CMPA/CMPB values again.

    2) If your PWM output is being set on 0 and cleared on CMPA or CMPB, you can change your action qualifer settings to clear the output on 0. For this, I would suggest not using shadow loading for the action qualifier register that controls the action qualifier event on TBCTR = 0. This will cause the output to be cleared on CTR=0 on the next cycle and stay cleared until you configure TBCTR=0 to set the PWM output again.

    Let me know if you have any other questions.

  • Hi Jones,
        Thanks for your feedback. What you mean is that using "write a value of 0 to the CMPA/CMPB register. As long as you are shadow loading your CMPA/CMPB registers on TBCTR=0 " is the best way?

        And if I using a TZ interrupt function to waiting the time of TBCTR =dealytime to turn off the PWM.  For example:

    interrupt void epwm4_tz_isr(void)
    {
    static Uint16 dealytime=0;
    dealytime=(Uint16)(D2DParas.RunPrd*0.5);
    while((EPwm6Regs.TBCTR <= (dealytime+10))&& (EPwm6Regs.TBCTR >= (dealytime-10)))
    {
       EPwm6Regs.TZFRC.bit.OST = 1;
       EPwm7Regs.TZFRC.bit.OST = 1;
    }
    EALLOW;
    Cmpss7Regs.COMPSTSCLR.bit.HLATCHCLR = 1;
    EDIS;
    PieCtrlRegs.PIEACK.bit.ACK2 = 1;
    }

    Is right or not?

  • Hi Feng,

    Yes that is what I meant. If you want the output to shut-down at the beginning of the next cycle, I would recommend using a CMPA value of 0. However, in the event that the write to the CMPA register could occur right before or on TBCTR = 0, there is a risk of a 100% duty cycle if you shadow load CMPA on TBCTR=0. If you are using up-count mode, you can avoid this risk by loading CMPA on TBCTR=PRD instead.

    To clarify your question about your ISR,  is the following code what you intend to replace with the write to the CMPA register?

    EPwm6Regs.TZFRC.bit.OST = 1;
    EPwm7Regs.TZFRC.bit.OST = 1;

    Thank you,

    Luke