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Original question:
This is following up on another thread titled "Question on parameters used for resolver i/f in Digital Power SDK project / TIDM-02009"
The last response there was "The parameters are chosen primarily from targeted electric speed of the motor and electrical characteristics of the signal chain on your control board."
...referring to RESOLVER_OMEGA , RESOLVER_ZETA , and RESOLVER_PHASE_COMP_GAIN
My question here is: How were these resolver settings derived from the hardware used for TIDM-02009? From the schematics and/or design guide
Thanks!
Mark,
Fundamentally, the resolver implemented in TIDM-02009 is similar to the above image. There are a few differences but they do not affect the below explanations. Basically, the closed-loop transfer function of the PLL loop is of the form of a second-order system. The characteristic equation is of the form- s^2+2⋅ζ⋅ωn⋅s+ωn^2, where ζ is the damping ratio and ωn is the natural frequency of the system.
RESOLVER_OMEGA sets the ωn and therefore the bandwidth of the PLL. This is primarily determined by the maximum speed of the application. For TIDM-02009 it is set to 200Hz for the given max motor speed.
RESOLVER_ZETA is the damping ratio ζ. A damping ratio of 1 gives critical damping. Typically, a damping ratio of 0.707 provides a sufficiently fast step response without significant overshoot
Lastly, RESOLVER_PHASE_COMP_GAIN compensates for the phase delays introduced by the non-idealities in the resolver itself.
Hope this helps answer your question.
Regards,
Bhanu
