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TMS320F28379D: PWM singnal missing, when Phase shifting

Karthick Kumar T K
Prodigy 80 points
Part Number: TMS320F28379D

Hi,.

I'm using F28379D controller for my application of controlling two full bridge converter. In this, I am using 4-EPWMs. Im keeping EPWM1 as master and which will generate syncout event when EPWM_SYNC_OUT_PULSE_ON_COUNTER_ZERO. The problem I'm facing was (focusing only on EPWM3), when I'm changing the phase shift value from 0 to 1 in TBPHS of EPWM3, it's missing one entire cycle of pulse. I have tried with many variety of values and found that it happens only when I shift from 0 to other values. I have read some E2E forums and TRM, but didn't getting proper solution for this. The configuration which I've used in EPWM3 was given below, have a look at it. Kindly provide me the solution, why it's happening and how to resolve this. Thanks

EPWM3:

//
// Set-up TBCLK
//
EPWM_setTimeEPWM3_BASEPeriod(EPWM3_BASE, EPWM_TIMER_TBPRD-1);
EPWM_setPhaseShift(EPWM3_BASE, 0U);
EPWM_setTimeEPWM3_BASECounter(EPWM3_BASE, 0U);

//
// Set Compare values
//
EPWM_setCounterCompareValue(EPWM3_BASE,
EPWM_COUNTER_COMPARE_A,
(EPWM_TIMER_TBPRD/2)-1);
EPWM_setCounterCompareValue(EPWM3_BASE,
EPWM_COUNTER_COMPARE_B,
(EPWM_TIMER_TBPRD/2)-1);


//
// Set up counter mode
//
EPWM_setTimeEPWM3_BASECounterMode(EPWM3_BASE, EPWM_COUNTER_MODE_UP);
EPWM_disablePhaseShiftLoad(EPWM3_BASE);
EPWM_setClockPrescaler(EPWM3_BASE,
EPWM_CLOCK_DIVIDER_1,
EPWM_HSCLOCK_DIVIDER_1);

//
// Set up shadowing
//
EPWM_setCounterCompareShadowLoadMode(EPWM3_BASE,
EPWM_COUNTER_COMPARE_A,
EPWM_COMP_LOAD_ON_CNTR_ZERO);
EPWM_setCounterCompareShadowLoadMode(EPWM3_BASE,
EPWM_COUNTER_COMPARE_B,
EPWM_COMP_LOAD_ON_CNTR_ZERO);


EPWM_setDeadBandControlShadowLoadMode(EPWM3_BASE, EPWM_DB_LOAD_ON_CNTR_ZERO);

//
// Set actions
//
EPWM_setActionQualifierAction(EPWM3_BASE,
EPWM_AQ_OUTPUT_A,
EPWM_AQ_OUTPUT_HIGH,
EPWM_AQ_OUTPUT_ON_TIMEEPWM3_BASE_ZERO);
EPWM_setActionQualifierAction(EPWM3_BASE,
EPWM_AQ_OUTPUT_B,
EPWM_AQ_OUTPUT_HIGH,
EPWM_AQ_OUTPUT_ON_TIMEEPWM3_BASE_ZERO);
EPWM_setActionQualifierAction(EPWM3_BASE,
EPWM_AQ_OUTPUT_A,
EPWM_AQ_OUTPUT_LOW,
EPWM_AQ_OUTPUT_ON_TIMEEPWM3_BASE_UP_CMPA);
EPWM_setActionQualifierAction(EPWM3_BASE,
EPWM_AQ_OUTPUT_B,
EPWM_AQ_OUTPUT_LOW,
EPWM_AQ_OUTPUT_ON_TIMEEPWM3_BASE_UP_CMPB);

//
// ePWM1 SYNCO is generated on CTR=0
//
EPWM_setSyncOutPulseMode(EPWM1_BASE, EPWM_SYNC_OUT_PULSE_ON_COUNTER_ZERO);

Here i've attached the missing pulse event. Yellow - EPWM3A, Green - EPWM3B both are complementry signals. 

  • 0
    TI__Mastermind 21110 points

    Hi Karthick,

    When are updating your TBPHS value to 1? I also see that you are disabling phase shift load for EPWM3 in the initialization. You should be sure to enable phase shift loading to implement your phase shift, are you changing this in your ISR where you update TBPHS? 

    Best regards,

    Allison

  • 0 in reply to Allison Nguyen
    Prodigy 80 points

    Hi, Thanks for your quick response.

    Actually I'm changing the phase shift through debugging mode by directly changing the TBPHS register values. Initially it was kept running at 0-phase. Once I change its value to 1, it misses once cycle of pulse then comes to normal condition. And I'm disabling first, then enabling the Enable Phase Load function on EPWM3 after the configuring the peripheral. 

    7077.Epwm.c
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    //EPWM FirmWare Source File
    #include "can_fw.h"
    #include "epwm_fw.h"
    #include "config_fw.h"
    #include "driverlib.h"
    #include "device.h"
    #include "SFO_V8.h"
    #include "conv_fw.h"
    #include "sw_timer.h"
    #include "sdfm_fw.h"
    #include "cmpss.h"
    #define EPWM_MAX_DEADBAND_TIME 300U//4840U//4000U //This if for slow start, it will start with max DB then reduce little by little,
    //So that the PWM will increase slowly.Avoid capacitor Current spikes.
    #define EPWM_DEADBAND_STEP_SIZE 10U//10U//100U
    #define EPWM_CLOCK_CYCLE 10U //period in nanoSeconds
    #define EPWM_SHIFT_AMOUNT 7U
    #define EPWM_DEADBAND_VALUE(X) ((X / EPWM_CLOCK_CYCLE) << EPWM_SHIFT_AMOUNT)
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
    I'm attaching the configuration file which I've used. 

  • 0 in reply to Karthick Kumar T K
    TI__Mastermind 21110 points

    Hi Karthick,

    Thanks for sharing your .c code; I see you are using HRPWM as well now. It looks like you are setting the EPWM modules to be in up-count while implementing HR deadband module, is that correct? There is a note in the device TRM section 15.14.1.6 Deadband High-Resolution Operation that states "In up-count mode, the dead-band module is not available when any high-resolution mode is enabled." So I would recommend switching to up-down count mode instead for this application if you are not doing so. There is also another note in section 15.7.2 Dead-band Submodule Additional Operating Modes stating "High-resolution dead-band RED and FED requires Half-Cycle clocking mode (DBCTL[HALFCYCLE] = 1)", so please look into this as well. If you are going to use up-down count, you should also ensure that if you are using HR time base period control, CMPA/B must have shadow loading enabled for when 'TBCTR = 0 or PRD'. 

    Let me know if I am misunderstanding your program so far or if you need clarification here as well.

    Best Regards,

    Allison

  • 0 in reply to Allison Nguyen
    Prodigy 80 points

    Hi, Thanks for the reply.
        I've configured as HRPWM in my code, but I'm not using any HRPWM functionalities. But, however this time I've disabled all HRPWM from the code and checked the PWMs. But, I'm facing the same issue this time too. My observation was, when doing in debugger mode. When, I'm changing the TBPHS from higher value to lower value, I'm observed there's a missing of pulse, with their difference (High_value - Low_value). I've share some images with changing phase shift from different values. Can you please check what I'm doing wrong and suggest a proper way of doing. I've attached the new .C code.

    8780.Epwm.c
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    //EPWM FirmWare Source File
    #include "can_fw.h"
    #include "epwm_fw.h"
    #include "config_fw.h"
    #include "driverlib.h"
    #include "device.h"
    #include "SFO_V8.h"
    #include "conv_fw.h"
    #include "sw_timer.h"
    #include "sdfm_fw.h"
    #include "cmpss.h"
    #define EPWM_MAX_DEADBAND_TIME 300U//4840U//4000U //This if for slow start, it will start with max DB then reduce little by little,
    //So that the PWM will increase slowly.Avoid capacitor Current spikes.
    #define EPWM_DEADBAND_STEP_SIZE 10U//10U//100U
    #define EPWM_CLOCK_CYCLE 10U //period in nanoSeconds
    #define EPWM_SHIFT_AMOUNT 7U
    #define EPWM_DEADBAND_VALUE(X) ((X / EPWM_CLOCK_CYCLE) << EPWM_SHIFT_AMOUNT)
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX


    Note: Time period of PWM is 10uS. Duty is 50% (5uS). Yellow - PWM3A, Green - PWM3B
    1. Phase shift value in TBPHS: changed from 999 to 1

     

    2. Phase shift value in TBPHS: changed from 999 to 750

    3. Phase shift value in TBPHS: changed from 750 to 1

     

    4. Phase shift value in TBPHS: changed from 900 to 800

    Thanks.

  • 0 in reply to Karthick Kumar T K
    TI__Mastermind 21110 points

    Hi Karthick,

    Missing pulses and longer high pulses can sometimes occur due to the order of events as well as the TBPHS value you are switching to - which can cause missing action qualifiers. Here is a brief explanation of this happening on another thread: https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1185529/tms320f280049c-the-first-period-of-the-output-waveform-is-abnormal-after-the-pwm-phase-shift-value-changes-from-0-to-non-0?tisearch=e2e-sitesearch&keymatch=missing%2525252520pulse%2525252520phase%2525252520shift#.

    Since you are in up-count mode, keep in mind CTR=PRD and CTR=0 occur together as well. In the explanation from that other thread I listed, you will note that this pulse behavior is expected (and it is harder to tell if there is actually an issue here since you are changing the TBPHS value directly in registers during debugger mode and we don't know when exactly this is implemented in the flow of events as opposed to updating it at some fixed time). 

    Are you trying to update the TBPHS value at some fixed/known time/ISR and still seeing an issue occur? Or is it only when you are changing the TBPHS value manually in debugging mode?

    Best Regards,

    Allison

  • 0 in reply to Allison Nguyen
    Prodigy 80 points

    Hi, Sorry for the delay. Thank you for your suggestions. I've gone through the threads which you've shared. Now, I've managed to take actions on the missing pulse, during the compare events. But, while testing the code now I found one more issue. This was not expected and I didn't get any idea why it's happening.

    In my code I'm using Up-Down count mode with Period of 500. I've compare events such as CMPA = CMPB = 250. AQ Events are, PWM4A HIGH when Up-CMPA and PWM4A LOW when Down-CMPB. By default, it's down count after sync. The issue I'm facing was when I'm going TBPHS value from 499 to 500, I'm facing the same missing pulse. I don't know what causing the signal to not going low, the PWMA signal is high for one entire cycle. I've attached my code and snap of the oscilloscope image also. Can you please find the issue and why is that strange thing is happening. Thanks

    EPWM FirmWare Source File.c
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    //EPWM FirmWare Source File
    #include "can_fw.h"
    #include "epwm_fw.h"
    #include "config_fw.h"
    #include "driverlib.h"
    #include "device.h"
    #include "SFO_V8.h"
    #include "conv_fw.h"
    #include "sw_timer.h"
    #include "sdfm_fw.h"
    #include "cmpss.h"
    #define EPWM_MAX_DEADBAND_TIME 300U//4840U//4000U //This if for slow start, it will start with max DB then reduce little by little,
    //So that the PWM will increase slowly.Avoid capacitor Current spikes.
    #define EPWM_DEADBAND_STEP_SIZE 10U//10U//100U
    #define EPWM_CLOCK_CYCLE 10U //period in nanoSeconds
    #define EPWM_SHIFT_AMOUNT 7U
    #define EPWM_DEADBAND_VALUE(X) ((X / EPWM_CLOCK_CYCLE) << EPWM_SHIFT_AMOUNT)
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
    Image showing PWM4A during phase transition from499 to 500.

    One more check I've done that, I've enabled PWM-ISR for DOWN_CMPB event. In the ISR I'm toggling one GPIO. I've found that, the ISR event is also not generated, when it's missing the pulse. I've attached image of scope. Yellow signal is EPWM4A(missing pulse), Green signal is GPIO Toggle on Down_CMPB event. I've attached drawn image of my understanding on the phase shift, correct me if I'm wrong. Kindly, verify and provide solution for this issue soon. Thanks

  • 0 in reply to Karthick Kumar T K
    TI__Mastermind 21110 points

    Hi Karthik,

    Glad you were able to review the threads and resolve the first part of the issue!

    Before we get into debugging this further, I again wanted to ask if you are using HR settings when testing (I know before, you said you weren't). It's always wise to test it without HR enabled to verify that it isn't just an HR configuration issueSlight smile.

    Your understanding looks correct to me. But I'm wondering if this again has to do with the timing of syncing and the specific value that may be generating the missing AQ. Does this missing AQ occur for all sync events when TBPHS = 500? Do you see the same behavior if you set your TBPHS to any other values? When exactly are you issuing the sync event to occur? And for system context - is there a reason why you need a phase shift of 500 in your application?

    Best Regards,

    Allison