TMS320F2810: section 'codestart' at 03f7ff6h falls in unconfigured memory

	../../../../Cpu/TMS320F2810/softfloat/softfloat.obj

MEMORY
{
PAGE 0 : 	  
   BOOT(R)     : origin = 0x3E8000, length = 0x000080	  /* */
   FLASHE      : origin = 0x3E8080, length = 0x007F7F     /* on-chip FLASH Program   */
   FLASHC      : origin = 0x3F0000, length = 0x004000     /* on-chip FLASH Program   */
   FLASHB      : origin = 0x3F4000, length = 0x002000     /* on-chip FLASH Program   */
   FLASHA      : origin = 0x3F6000, length = 0x001F7F     /* on-chip FLASH Bootloader*/	
   PROG(RWX)   : origin = 0x3F8000, length = 0x001FFF     /* RAM Bereich für Code (ramfuncs) */   
   CSM_RSVD	   : origin = 0x3F7F80, length = 0x000076	  /* Area for CSM enable */
   RESET       : origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM (MP/MCn=0) or XINTF zone 7 (MP/MCn=1) */   
   BEGIN       : origin = 0x3F7FF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
   CSM_PWL     : origin = 0x3F7FF8, length = 0x000008

PAGE 1 : 
   /* SARAM                     */     
   M0RAM(RW)   : origin = 0x000000, length = 0x400
   M1RAM(RW)   : origin = 0x000400, length = 0x400
   L0L1RAM(RW) : origin = 0x008000, length = 0x2000
   
   /* Peripheral Frame 0:   */
   DEV_EMU    : origin = 0x000880, length = 0x000180
   FLASH_REGS : origin = 0x000A80, length = 0x000060
   CSM_REGS   : origin = 0x000AE0, length = 0x000010
   XINTF      : origin = 0x000B20, length = 0x000020
   CPU_TIMER0 : origin = 0x000C00, length = 0x000008
   CPU_TIMER1 : origin = 0x000C08, length = 0x000008		 
   CPU_TIMER2 : origin = 0x000C10, length = 0x000008		 
   PIE_CTRL   : origin = 0x000CE0, length = 0x000020
   PIE_VECT   : origin = 0x000D00, length = 0x000100

   /* Peripheral Frame 1:   */
   ECAN_A     : origin = 0x006000, length = 0x000100
   ECAN_AMBOX : origin = 0x006100, length = 0x000100

   /* Peripheral Frame 2:   */
   SYSTEM     : origin = 0x007010, length = 0x000020
   SPI_A      : origin = 0x007040, length = 0x000010
   SCI_A      : origin = 0x007050, length = 0x000010
   XINTRUPT   : origin = 0x007070, length = 0x000010
   GPIOMUX    : origin = 0x0070C0, length = 0x000020
   GPIODAT    : origin = 0x0070E0, length = 0x000020
   ADC        : origin = 0x007100, length = 0x000020
   EV_A       : origin = 0x007400, length = 0x000040
   EV_B       : origin = 0x007500, length = 0x000040
   SPI_B      : origin = 0x007740, length = 0x000010
   SCI_B      : origin = 0x007750, length = 0x000010
   MCBSP_A    : origin = 0x007800, length = 0x000040

}
 
 
SECTIONS
{  
   /* Allocate Peripheral Frame 0 Register Structures:   */
   DevEmuRegsFile    : > DEV_EMU,    PAGE = 1
   FlashRegsFile     : > FLASH_REGS, PAGE = 1
   CsmRegsFile       : > CSM_REGS,   PAGE = 1
   XintfRegsFile     : > XINTF,      PAGE = 1
   CpuTimer0RegsFile : > CPU_TIMER0, PAGE = 1      
   CpuTimer1RegsFile : > CPU_TIMER1, PAGE = 1      
   CpuTimer2RegsFile : > CPU_TIMER2, PAGE = 1      
   PieCtrlRegsFile   : > PIE_CTRL,   PAGE = 1      
   PieVectTable      : > PIE_VECT,   PAGE = 1

   /* Allocate Peripheral Frame 2 Register Structures:   */
   ECanaRegsFile     : > ECAN_A,      PAGE = 1   
   ECanaMboxesFile   : > ECAN_AMBOX   PAGE = 1

   /* Allocate Peripheral Frame 1 Register Structures:   */
   SysCtrlRegsFile   : > SYSTEM,     PAGE = 1
   SpiaRegsFile      : > SPI_A,      PAGE = 1
   SciaRegsFile      : > SCI_A,      PAGE = 1
   XIntruptRegsFile  : > XINTRUPT,   PAGE = 1
   GpioMuxRegsFile   : > GPIOMUX,    PAGE = 1
   GpioDataRegsFile  : > GPIODAT     PAGE = 1
   AdcRegsFile       : > ADC,        PAGE = 1
   EvaRegsFile       : > EV_A,       PAGE = 1
   EvbRegsFile       : > EV_B,       PAGE = 1
   ScibRegsFile      : > SCI_B,      PAGE = 1
   McbspaRegsFile    : > MCBSP_A,    PAGE = 1
   
   /* 22-bit program sections */
   .reset   : > RESET,   PAGE = 0, TYPE = DSECT
   .pinit   : > FLASHE,	 PAGE = 0
   .cinit   : > FLASHE,	 PAGE = 0
   .text    : > FLASHE,	 PAGE = 0
    csm_enable : > CSM_RSVD, PAGE = 0
    codestart : > BEGIN       PAGE = 0
    ramfuncs  : LOAD = FLASHB, RUN = PROG, PAGE = 0
    secValid  : LOAD = 0x3F5FFA, PAGE = 0

   /* 16-Bit data sections */
   .const   : > FLASHE, PAGE = 0
   .bss     : > M0RAM, PAGE = 1
   .stack   : > M1RAM, PAGE = 1
   .sysmem  : > M0RAM, PAGE = 1

   /* 32-bit data sections */
   .ebss    : > L0L1RAM, PAGE = 1
   .econst  : > FLASHE, PAGE = 0
   .switch  : > FLASHE  PAGE = 0      
   .esysmem : > L0L1RAM, PAGE = 1
   CsmPwlFile : > CSM_PWL,     PAGE = 0     /* CSM Password Locations */
   
   .boot > BOOT
   {
    	-l../../../../Cpu\TMS320F2810\rts2800_ml.lib <boot.obj> (.text)
   }
   
   support LOAD = FLASHB, RUN = PROG, PAGE = 0
   {
   		-l../../../../Cpu\TMS320F2810\Bootloader\Flash2810_API_V210.lib (.text)
   		-l../../../../Cpu\TMS320F2810\Bootloader\Flash2810_API_V210.lib (.econst)
   }

}

CodeStartBranch.asm

    .ref _c_int00
    .sect "codestart"
    
code_start:    
    LB _c_int00

map file

codestart 
*          0    003f7ff6    00000002     
                  003f7ff6    00000002     CodeStartBranch.obj (codestart)

you are right: it comes from the hex2000 utility, which is processed directly after the build. Because we want a file without boot section, the warning is OK. Many thanks!