This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28377D: Syncout at CMPB when down counting in updown mode

Part Number: TMS320F28377D

Hi,

For the SYNCOSEL option given in EPWM modules, how can we specify the direction of count while choosing CMPB option. I am using an updown counter mode in my EPWM configuration. I want to create a syncout from EPWM1 at a specific CTR value while down counting. 

5-4 SYNCOSEL -Sync Output Select
00: EPWMxSYNCI / SWFSYNC
01: CTR = zero: Time-base counter equal to zero (TBCTR = 0x00)
10: CTR = CMPB : Time-base counter equal to counter-compare B
(TBCTR = CMPB)
11: EPWMXSYNCO is defined by TBCTL2[SYNCOSELX]
Reset type: SYSRSn

Out of the above options, how is it possible to define the direction of counting while choosing option -10 (CTR = CMPB ).

Any help would be appreciated. 

Thanks 

Deepthi

  • Hi Deepthi,

    You can select the counter direction that occurs after the EPWM receives a sync-in pulse by using the PHSDIR bit of the TBCTL register:

    Keep in mind that the SYNCOSEL chooses the event where EPWM1 module will send out as a sync-out pulse that other EPWM modules can use as a sync-in source- as seen in the TRM Figure 15-7. Time-Base Counter Synchronization Scheme. You can only use the PHSDIR bit (mentioned above) to alter the direction after EPWM1 receives a sync-in pulse - for EPWM1 this is sourced from an external sync source or you can use a software-forced sync pulse (SWFSYNC bit of TBCTL register) to issue a sync pulse. This is also shown in that same figure.

    Best Regards,

    Allison

  • Hi Allison,

    Thank you for responding to my query. 

    The intention is not to alter the count direction. 

    Maybe I should reframe my question. 

    I wanted to know how to generate the sync pulse only while timer is decrementing (in an updown counter mode).

    For example, while choosing an event for epwm interrupt, we have some options as below

    INTSEL  ePWM Interrupt (EPWMx_INT)

    Selection Options

    000: Reserved
    001: Enable event time-base counter equal to zero. (TBCTR = 0x00)
    010: Enable event time-base counter equal to period (TBCTR =TBPRD)
    011: Enable event time-base counter equal to zero or period (TBCTR = 0x00 or TBCTR = TBPRD). This mode is useful in updown count mode.
    100: Enable event time-base counter equal to CMPA when the timer is incrementing or CMPC when the timer is incrementing
    101: Enable event time-base counter equal to CMPA when the timer is decrementing or CMPC when the timer is decrementing
    110: Enable event: time-base counter equal to CMPB when the timer is incrementing or CMPD when the timer is incrementing
    111: Enable event: time-base counter equal to CMPB when the timer is decrementing or CMPD when the timer is decrementing.

    Here, there are options to generate event when " time-base counter equal to CMPB when the timer is decrementing".

    I wanted a similar option available to generate sync out pulse from EPWM1 to EPWM2. 

    Kindly note my query is regarding sync out generation only and not about any interrupts. Especially in the configuration of SYNCOSEL register. 

  • Hi Deepthi,

    Thanks for the clarification!

    Unfortunately there is no hardware implementation of selecting CMPB-down as an event source for sync-out pulses like there is for interrupts as you highlighted. Having a sync-out pulse only on CTR=CMPB-down when using up-down count must be implemented in software. Let me know if I can help with anything else!

    Best Regards,

    Allison

  • Hi Allison,

    Thank you for confirming this aspect. I will try some other options in this regard.

    Thanks and Regards

    Deepthi

  • No problem, Deepthi. I will go ahead and close this thread for now, but feel free to open another or send me a message if you have any other questions!

    Best Regards,

    Allison

  • Sure Allison. Thanks for the support.

    Thanks and regards

    Deepthi