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TMS320F2800156-Q1: F2800156 LIN communication timeout Flag time

CHAN WOO LEE
Prodigy 10 points
Part Number: TMS320F2800156-Q1

TIMEOUT Flag of SCIFLT Reg. is becomes 1 after about 5 seconds.

I want to change that time to 2 seconds.

I can't find source code related to that time.

Is there no way?

thanks for your help.

  • 0
    TI__Genius 13795 points

    Hello,

    The amount of time the LIN bus has to be idle for the TIMEOUT flag to set is something that is setup in the LIN peripheral's design. It is set to trigger after around 4 seconds and cannot be configured/changed on the application level. Can you explain a little more about why you are trying to shorten the time? I can discuss with other experts to see if there is another way to trigger an interrupt on this condition (potentially using another peripheral), based on your use case.

    Best Regards,

    Delaney

  • 0 in reply to Delaney Woodward
    Prodigy 10 points

    The requirement is 2 seconds. Sleep mode must be performed 2 seconds after LIN communication is disconnected.

  • 0 in reply to CHAN WOO LEE
    TI__Genius 13795 points

    Hello,

    I believe you could use the CLB module to detect when the line is high for 2 seconds, generate a CLB interrupt on this condition, and then the POWERDOWN bit (SCIGCR2.0) could be set in the CLB ISR. I will loop in an CLB expert to comment on this.

    Additionally, what SYSCLK frequency are you using?

    Best Regards,

    Delaney

  • 0 in reply to Delaney Woodward
    Prodigy 10 points

    I will check what you told me.

    SYSCLK is 100Mhz.

  • 0 in reply to CHAN WOO LEE
    TI__Mastermind 30185 points

    Hello Chan,

    Delaney Woodward said:
    I believe you could use the CLB module to detect when the line is high for 2 seconds, generate a CLB interrupt on this condition, and then the POWERDOWN bit (SCIGCR2.0) could be set in the CLB ISR.

    What Delaney stated here is correct, you can route an input signal from a GPIO pin to the CLB and use the counter to count how long it's high (the counters are 32-bit, so this is feasible). From there, you can create a match condition for the counter to generate an interrupt via the High Level Controller (HLC), and within the interrupt you can perform whatever operations are necessary for your application.