Hi BU experts,
In my customer application, they use InitSysPll to configure the PLL when initialization.
They use IMUL=5 and FMUL=0, divider is /1. With this configuration, the VCO output frequency in PLL circuit is 50MHz. But from spec in datasheet, the min of VCO frequency is 120MHz. Will it ok for F28004x?
And they also found one phenomenon that in Boot they use IMUL of 10 and divider of /2, in App they use IMUL of 5 and divider of /1. And in APP, the program will get into Flash Uncorrectable error trap when it executes InitSysPLL in APP. Could you help to analyze why?
Regards,
Will
