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Original question:

TMS320F28388D: EPWM sync in tms320

TMS320F280039C: Missing PWM pulse on slave ePWM when TBPHS is first loaded into TBCTR

Pak Long Chan
Prodigy 10 points

Part Number: TMS320F280039C

Tool/software:

Currently, I am working on the Phase Shift Full Bridge DCDC converter application with F28003C MCU.

Background info:
I set my EPWM3 and EPWM4 as master and slave relationship, that EPWM4 will sync with EPWM3's rising edge (or when counter hits zero).
Both epwm are in up-down count mode, set as high when counter = 0 and set as low when counter = period. 

Question:
when loading TBPHS into the counter, there will be a missing pulse on epwm4. 
my epwm4A and 4B are set as complimentary, so when there is a missing pulse on 4A, 4B will set as high. Resulting in an "overlapped duty" between epwm3a and epwm4b, which is very undesired.
Can this be prevented? It seems to happen only when loading TBPHS from 0 to certain value.

Please advise what could be done to solve this missing pulse problem, thanks.


Channel 1 is EPWM3A
Channel 2 is ISR update
Channel 3 is EPWM4A
Channel 4 is EPWM4B

  • 0
    TI__Mastermind 28580 points

    Hi Pak Long Chan,

    It seems that when the sync pulse comes from EPWM3, EPWM4's TBCTR is just before 0, and then the sync pulse makes it so that the TBCTR=0 action qualifier event is skipped. This is expected due to the nature of the action qualifier module. If a counter value that contains an action qualifier event is skipped, that action qualifier event will never occur.

    To resolve this you can set CMPA equal to TBPHS+1 and set high on CMPA when counting up.

    Let me know if this works for you,

    Thank you,

    Luke