TMS320F28388D: Issue with IPC Communication: CM to CPU1 Interrupt Triggering Only Once

Tool/software:

Hello,

I am encountering an issue with IPC communication in my code. I have configured the CM to continuously send data to CPU1 using Flag3. However, the interrupt on CPU1 is only triggering once, and I verified that the ACK flag is showing zero. On the other hand, when I perform the same communication from CPU1 to CM, the interrupt triggers continuously as expected. I have attached my code for your reference. Could you please take a look and help me identify the issue?

Best,

SaiPavan.

//code for IPC from CM to CPU1

#include "cm.h"
#include "ipc.h"

#define IPC_CMD_READ_MEM 0x1001
#define IPC_CMD_RESP 0x2001

#define TEST_PASS 0x5555
#define TEST_FAIL 0xAAAA

#pragma DATA_SECTION(readData, "MSGRAM_CM_TO_CPU1")
uint32_t readData[10];
uint32_t count1=0;

uint32_t pass;

void main(void){
int i;

CM_init();

// Clear any IPC flags if set already
//
IPC_clearFlagLtoR(IPC_CM_L_CPU1_R, IPC_FLAG_ALL);

//
// Synchronize both the cores.
//
IPC_sync(IPC_CM_L_CPU1_R, IPC_FLAG31);
// IPC_registerInterrupt(IPC_CM_L_CPU1_R, IPC_INT1, IPC_ISR1);

for(i=0; i<10; i++)
{
readData[i] = i;
}
while(1){
DEVICE_DELAY_US(1000000);
IPC_sendCommand(IPC_CM_L_CPU1_R, IPC_FLAG3, IPC_ADDR_CORRECTION_ENABLE,
IPC_CMD_READ_MEM, (uint32_t)readData, 10);

//
// IPC_waitForAck(IPC_CM_L_CPU1_R, IPC_FLAG3);
// Clear the flag to send the next command
IPC_clearFlagLtoR(IPC_CM_L_CPU1_R, IPC_FLAG3);
}
}

//This the code for CPU1

#include "driverlib.h"
#include "device.h"

//
// Defines
//
#define IPC_CMD_READ_MEM 0x1001
#define IPC_CMD_RESP 0x2001

#define TEST_PASS 0x5555
#define TEST_FAIL 0xAAAA

bool check=0;
uint32_t count=0;
uint32_t readData[10];
__interrupt void IPC_ISR3()
{
int i;
uint32_t command, addr, data;
bool status = false;
count++;
GPIO_togglePin(31);
//
// Read the command
//
IPC_readCommand(IPC_CPU1_L_CM_R, IPC_FLAG3, IPC_ADDR_CORRECTION_ENABLE,
&command, &addr, &data);

if(command == IPC_CMD_READ_MEM)
{
status = true;
for(i=0; i<data; i++)
{
if(*((uint32_t *)addr + i) != i) //(uint32_t *) is a typecast that tells the compiler to treat the value of addr as a pointer to a uint32_t (32-bit unsigned integer).
status = false;
}
}

IPC_ackFlagRtoL(IPC_CPU1_L_CM_R, IPC_FLAG0);
// IPC_clearFlagLtoR(IPC_CPU1_L_CM_R, IPC_FLAG3);
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP1);
check=IPC_isFlagBusyLtoR(IPC_CPU1_L_CM_R,IPC_FLAG3);
}
//
// Main
//
void main(void)
{

//
// Initialize device clock and peripherals
//
Device_init();

//
// Boot CM core
//
#ifdef _FLASH
Device_bootCM(BOOTMODE_BOOT_TO_FLASH_SECTOR0);
#else
Device_bootCM(BOOTMODE_BOOT_TO_S0RAM);
#endif
GPIO_setPadConfig(31, GPIO_PIN_TYPE_PULLUP); // Enable pullup on GPIO6
GPIO_writePin(31, 1); // Load output latch
GPIO_setPinConfig(GPIO_31_GPIO31); // GPIO6 = GPIO6
GPIO_setDirectionMode(31, GPIO_DIR_MODE_OUT); // GPIO6 = output
//
// Initialize PIE and clear PIE registers. Disables CPU interrupts.
//
Interrupt_initModule();

//
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
//
Interrupt_initVectorTable();

//
// Clear any IPC flags if set already
//
IPC_clearFlagLtoR(IPC_CPU1_L_CM_R, IPC_FLAG_ALL);

IPC_registerInterrupt(IPC_CPU1_L_CM_R, IPC_INT3, IPC_ISR3);

IPC_sync(IPC_CPU1_L_CM_R, IPC_FLAG31);
EINT;
ERTM;

while(1){
}
}

//
// End of File
//