• State
  • Locked Locked
  • Replies 0 replies
  • Subscribers 82 subscribers
  • Views 535 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

[FAQ] F29H859TU-Q1: F29H85x Flash Plugin usage notes

Charles Roberson
Genius 11825 points
Part Number: F29H859TU-Q1

Tool/software:

Note: Update for CCSv20 - C29 Feature Support 1.2.14.0. This page will continue to be updated as necessary for relevant information to the FAQ.

Question: Where are the Flash Settings for my device in CCS?

Answer: In order to reach the Flash Settings, proceed with the following steps:

  1. Connect to the device by right-clicking the Target Configuration ccxml for your device and select ‘Start Project-less Debug’.
  2. Right-Click the CPU target thread for your device and select the ‘Connect Target’ option.
  3. Right-click the CPU target thread and scroll down to select the ‘Properties’ tab.
  4. A dialog box will appear showing the current device core and CCS category. Select the ‘Category’ option and click on the option listed as ‘Flash Settings’.

Question: Where can I find debug information output?

Answer: Debug programming messages can be found in the Debug Output tab in the CCS Interface. In order to enable verbose output, select the ‘Enable Verbose Output’ checkbox at the end of the Flash Settings dialog box.

Question: What are the User Config Settings within Flash Settings category?

Answer: The User Config Settings for the devices provides information for the Flash Bank Mode Settings before load operations for either CPU1 or CPU3. A CPU configuration map is provided per bank mode and details the flash read-interface (FRI) used with the associated CPU core. When switching between Bank Modes, select the desired bank mode. 

Question: I’m unable to load both CPU1 and CPU3 flash applications using the Flash Plugin with CPU1 core.

Answer: In the Erase Settings configuration selection, make sure that you have selected “Necessary Banks Only (for Program Load)” as your option.

TMS320F29H85x Flash plugin usage notes: 

(1) Before doing any flash operations using the flash plugin,

     (a) Please select which bank mode will be used for CPU operation – Bank Mode 0, Bank Mode 1, Bank Mode 2, Bank Mode 3 (Note: This selection should be done in CPU1 flash plugin GUI).

     (b) Please select the flash banks that the user would like the flash plugin to erase.

(2) When loading data to SECCFG memory region within your .out file,  select the option to ‘Allow NonMain Flash erase before loading data to Flash memory’. Note - For verify failure when programming SECCFG memory region, unselect the ‘Verify flash program’ checkbox in the Flash Settings -> Download Settings box. An update will be provided in later release.

(3) The Flash Bank Mode Select in the User Config Settings will remember the previous bank mode the device is in. The actual bank mode can be determined by looking at the SSUGENREGS.BANKMODE register. After programming the desired Bank Mode, the device MUST BE RESET THROUGH XRSn to enable the new configuration.

(4) When loading data to the NonMain BANKMGMT and CERT memory regions within your .out file, select the option to ‘Allow NonMain Flash erase before loading data to Flash memory’. WARNING – Erasing NonMain BANKMGMT and CERT memory regions will erase programmable OTP, please proceed with caution. Enable NonMain sector erase ONLY if BANKMGMT  or CERT programming is necessary.

Reference material:

F29H85x Real-Time Microcontrollers Data Manual

F29H85x Real-Time Microcontrollers Technical Reference Manual